HUF76107D3 Datasheet, PDF (6/10 Pages) Fairchild Semiconductor – 20A, 30V, 0.052 Ohm, N-Channel, Logic Level UltraFET Power MOSFETs

HUF76107D3, HUF76107D3S
Typical Performance Curves Unless otherwise specified (Continued)
600
V_GS = 0V, f = 1MHz
500
C_ISS = C_GS + C_GD
C_RSS = C_GD
C_OSS ≈ C_DS + C_GD
400
C_ISS
300
200
100
0
0
C_OSS
C_RSS
5
10
15
20
25
30
V_DS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 13. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10
V_DD = 15V
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
2
I_D = 20A
I_D = 12A
I_D = 5A
0
0
2
4
6
8
10
Q_g, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 14. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
100
V_GS = 4.5V, V_DD = 15V, I_D = 10A, R_L= 1.50Ω
80
t_r
60
t_d(OFF) ^tf
40
20
t_d(ON)
0
0
10
20
30
40
50
R_GS, GATE TO SOURCE RESISTANCE (Ω)
FIGURE 15. SWITCHING TIME vs GATE RESISTANCE
Test Circuits and Waveforms
V_DS
VARY t_P TO OBTAIN
REQUIRED PEAK I_AS
R_G
V_GS
t_P
0V
L
DUT
+
V_DD
-
I_AS
0.01Ω
100
V_GS = 10V, V_DD = 15V, I_D = 20A, R_L= 0.75Ω
80
t_d(OFF)
60
t_r
t_f
40
20
t_d(ON)
0
0
10
20
30
40
50
R_GS, GATE TO SOURCE RESISTANCE (Ω)
FIGURE 16. SWITCHING TIME vs GATE RESISTANCE
t_P
I_AS
BV_DSS
V_DS
V_DD
0
t_AV
FIGURE 17. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 18. UNCLAMPED ENERGY WAVEFORMS
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