CD4514BMS Datasheet, PDF (6/9 Pages) Intersil Corporation – CMOS 4-Bit Latch/4-to-16 Line Decoders

CD4514BMS, CD4515BMS
Logic Diagram
VDD
VSS
*
DATA 1 2
*
DATA 2 3
*
DATA 3 21
*
DATA 4 22
*
STROBE 1
*
INHIBIT 23
A
SQ
RQ
B
SQ
RQ
S QC
RQ
D
SQ
RQ
ABCD
11 S0
ABCD
9 S1
ABCD
10 S2
ABCD
8 S3
ABCD
7 S4
ABCD
6 S5
ABCD
5 S6
ABCD
4 S7
ABCD
18 S8
ABCD
17 S9
ABCD
20 S10
ABCD
19 S11
ABCD
14 S12
ABCD
13 S13
ABCD
16 S14
ABCD
15 S15
* All inputs protected by CMOS protection network.
THESE INVENTERS USED ONLY ON CD4515BMS
FIGURE 1. LOGIC DIAGRAM
TRUTH TABLE
INHIBIT
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
DECODER INPUTS
DCBA
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
XXXX
1 = HIGH LEVEL
0 = LOW LEVEL
SELECTED OUTPUT
CD4514BMS = LOGIC 1 (HIGH)
CD4515BMS = LOGIC 0 (LOW)
S0
S1
S2
S3
S4
S5
S6
S7
S8
S9
S10
S11
S12
S13
S14
S15
All Outputs = 0, CD4514BMS
All Outputs = 1, CD4515BMS
X = DON’T CARE
7-1193