CD40257BMS Datasheet, PDF (6/8 Pages) Intersil Corporation – CMOS Quad 2 Line to 1 Line Data Selector/Multiplexer

Logic Diagram
OUTPUT
DISABLE
15*
INPUT
SELECT
1*
A1
2*
B1
3*
A2
5*
B2
6*
A3
11*
B3
10*
A4
14*
B4
13*
Specifications CD40257BMS
VDD
D1
4
VSS
TRUTH TABLE
INPUTS
OUTPUT
3-STATE
OUTPUT
DISABLE SELECT A B
D
1
X
XX
Z
0
0
0X
0
0
0
1X
1
0
1
X0
0
0
1
X1
1
X = Don’t care Logic 1 = High Logic 0 = Low
Z = High impedance
D2
7
VDD
3 ADDITIONAL IDENTICAL CIRCUITS
D3
9
D4
12
VSS
* ^{ALL INPUTS ARE PROTECTED}
BY CMOS PROTECTION
NETWORK
FIGURE 1.
Typical Performance Characteristics
AMBIENT TEMPERATURE (T_A) = +25^oC
AMBIENT TEMPERATURE (T_A) = +25^oC
30
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
25
20
15
10V
10
5
5V
0
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 2. TYPICAL OUTPUT LOW (SINK) CURRENT CHAR-
ACTERISTICS
15.0
GATE-TO-SOURCE VOLTAGE (VGS) = 15V
12.5
10.0
10V
7.5
5.0
2.5
5V
0
5
10
15
DRAIN-TO-SOURCE VOLTAGE (VDS) (V)
FIGURE 3. MINIMUM OUTPUT LOW (SINK) CURRENT CHAR-
ACTERISTICS
7-1447