CD40257BMS Datasheet, PDF (1/8 Pages) Intersil Corporation – CMOS Quad 2 Line to 1 Line Data Selector/Multiplexer

CD40257BMS
December 1992
CMOS Quad 2 Line to 1 Line
Data Selector/Multiplexer
Features
Pinout
• High Voltage Type (20V Rating)
• 3-State Outputs
CD40257BMS
TOP VIEW
• 100% Tested for Quiescent Current at 20V
• 5V, 10V and 15V Parametric Ratings
• Maximum Input Current of 1µA at 18V Over Full Pack-
age Temperature Range; 100nA at 18V and +25^oC
• Noise Margin (Over Full Package/Temperature Range)
- 1V at VDD = 5V
- 2V at VDD = 10V
- 2.5V at VDD = 15V
• Standardized Symmetrical Output Characteristics
INPUT SELECT 1
A1 2
B1 3
D1 4
A2 5
B2 6
D2 7
VSS 8
16 VDD
15 OUTPUT DISABLE
14 A4
13 B4
12 D4
11 A3
10 B3
9 D3
• Meets All Requirements of JEDEC Tentative Standard
No. 13B, “Standard Specifications for Description of
‘B’ Series CMOS Devices”
Applications
• Digital Multiplexing
• Shift Right/Shift Left Registers
• True/Complement Selection
Description
CD40257BMS is a data selector/multiplexer featuring three
state outputs which can interface directly with and drive data
lines of bus oriented systems.
The CD40257BMS is supplied in these 16-lead outline
packages:
Braze Seal DIP
H4T
Frit Seal DIP
H1E
Ceramic Flatpack H3X
Functional Diagram
2
A1
3
B1
5
A2
6
B2
11
A3
10
B3
14
A4
13
B4
OUTPUT
DISABLE
15
1
INPUT
SELECT
4
D1
7
D2
9
D3
12
D4
VDD = 16
VSS = 8
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
7-1442
File Number 3364