CD40175BMS Datasheet, PDF (6/8 Pages) Intersil Corporation – CMOS Quad ‘D’ Type Flip-Flop

Specifications CD40175BMS
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
Static Burn-In 1
(Note 1)
OPEN
GROUND
2, 3, 6, 7, 10, 11, 1, 4, 5, 8, 9, 12, 13
14, 15
VDD
16
9V ± -0.5V
50kHz
25kHz
Static Burn-In 2 2, 3, 6, 7, 10, 11,
8
(Note 1)
14, 15
1, 4, 5, 9, 12,
13, 16
Dynamic Burn-
-
In (Note 1)
8
1, 16
2, 3, 6, 7, 10, 11,
9
4, 5, 12, 13
14, 15
Irradiation
2, 3, 6, 7, 10, 11,
8
(Note 2)
14, 15
1, 4, 5, 9, 12,
13, 16
NOTES:
1. Each pin except VDD and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
Logic Diagram
D^*
CLR ^*
1
CLK ^*
9
CL
p
n
CL
CL
p
n
CL
CL
CL
CL
p
n
Q
CL
CL
p
n
Q
CL
FIGURE 1. 1 OF 4 FLIP-FLOPS
VDD
VSS
* ^{ALL INPUTS ARE PROTECTED}
BY CMOS PROTECTION
NETWORK
TRUTH TABLE FOR 1 OF 4 FLIP-FLOPS (Positive Logic)
INPUTS
OUTPUTS
CLOCK
DATA
CLEAR
Q
Q
0
1
0
1
1
1
1
0
X
1
Q
Q
X
X
0
0
1
1 = High level
X = Don’t care
0 = Low level
7-1397