RFT2P03L Datasheet, PDF (5/9 Pages) Intersil Corporation – 2.1A, 30V, 0.150 Ohm, P-Channel Logic Level, Power MOSFET

RFT2P03L
Typical Performance Curves Unless Otherwise Specified (Continued)
750
C_ISS
600
V_GS = 0V, f = 0.1MHz
C_ISS = C_GS + C_GD
450
C_RSS = C_GD
C_OSS
C_OSS ≈ C_DS + C_GD
300
150
0
0
C_RSS
-5
-10
-15
-20
-25
-30
V_DS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
-10
WAVEFORMS IN
DESCENDING ORDER:
-8
I_D = 2.1A
I_D = 1A
-6
V_DD = -15V
-4
-2
0
0
3
6
9
12
15
Q_g, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT
GATE CURRENT
Test Circuits and Waveforms
VARY t_P TO OBTAIN
REQUIRED PEAK I_AS
R_G
0V
V_GS
t_P
V_DS
L
DUT
-
V_DD
+
I_AS
0.01Ω
t_AV
0
V_DD
I_AS
t_P
BV_DSS
V_DS
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
V_GS
I_g(REF)
V_DS
R_L
DUT
-
V_DD
+
FIGURE 16. GATE CHARGE TEST CIRCUIT
0
V_GS= -2V
-V_GS
V_DD
0
I_g(REF)
Q_g(TH)
V_DS
Q_g(-10)
V_GS= -10V
Q_g(TOT)
V_GS= -20V
FIGURE 17. GATE CHARGE WAVEFORM
7-7-23