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RFG40N10LE Datasheet, PDF (5/8 Pages) Intersil Corporation – 40A, 100V, 0.040 Ohm, Logic Level N-Channel Power MOSFETs
RFG40N10LE, RFP40N10LE, RF1S40N10LESM
Typical Performance Curves Unless Otherwise Specified (Continued)
1.50
VGS = VDS, ID = 250µA
1.25
1.50
ID = 250µA
1.25
1.00
1.00
0.75
0.75
0.50
-80
-40
0
40
80 120 160 200
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 12. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
3500
2800
2100
1400
VGS = 0V, f = 1MHz
CISS = CGS + CGD
CRSS = CGD
COSS ≈ CDS + CGD
CISS
700
0
0
COSS
CRSS
5
10
15
20
25
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 14. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
RG
VGS
tP
0V
VDS
L
DUT
+
VDD
-
IAS
0.01Ω
FIGURE 16. UNCLAMPED ENERGY TEST CIRCUIT
5
0.50
-80 -40
0
40
80
120 160 200
TJ, JUNCTION TEMPERATURE (oC)
FIGURE 13. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
100
5.00
VDD = BVDSS
75
VDD = BVDSS
3.75
RL = 2.5Ω
IG(REF) = 1.7mA
50
VGS = 5V
2.50
PLATEAU VOLTAGES IN
DESCENDING ORDER:
25
VDD = BVDSS
VDD = 0.75 BVDSS
1.25
VDD = 0.50 BVDSS
VDD = 0.25 BVDSS
0
0
20 I-I-GG-----((--AR----CE----FT----)) t, TIME (µs)
80 I-I-GG-----((--AR----CE----FT----))
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 15. SWITCHING WAVEFORMS FOR CONSTANT GATE
CURRENT
tP
IAS
BVDSS
VDS
VDD
0
tAV
FIGURE 17. UNCLAMPED ENERGY WAVEFORMS