ISL6801 Datasheet, PDF (5/6 Pages) Intersil Corporation – High Voltage Bootstrap High Side Driver

Timing Diagrams
ISL6801
IN
RES
VS
HOH, L
t_{dIN-HOH, L}
RECHARGE
OFF
t_RechargeOFF
t_{dIN-HOH, L}
ON
t_RechargeON
90%
10%
t_HOH, L_rise
FIGURE 1. INPUT/OUTPUT TIMING DIAGRAM
90%
10%
t_HOH, L_fall
VB Drop Voltage Test
IN
RES
HOH, L
td_{RES-HOH, L}
td_{RES-HOH, L}
FIGURE 2. RESET TIMING DIAGRAM
I_g
1 V_CC
VB 8
50R
IN
2 IN
HOH 7
50R
1µ
3 GND HOL 6
4 RES
VS 5
6n8
ISL6801
FIGURE 3. VB DROP VOLTAGE TEST CIRCUIT
I_g
OFF
0A
IN
RES
7V
VB_DROP
VB-VS BREAK BEFORE MAKE
FIGURE 4. VB DROP VOLTAGE DIAGRAM
5