ISL6753_14 Datasheet, PDF (5/15 Pages) Intersil Corporation – ZVS Full-Bridge PWM Controller

ISL6753
Electrical Specifications
Recommended operating conditions unless otherwise noted. Refer to Block Diagram and Typical Application
schematic. 9V < VDD < 20V, RTD = 10.0kΩ, CT = 470pF, T_A = -40°C to 105°C (Note 3), Typical values are at
T_A = 25°C (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Bias Current
Clamp Voltage
V_RAMP = 0.3V
(Note 4)
-5.0
-
-2.0
µA
6.5
-
8.0
V
PULSE WIDTH MODULATOR
Minimum Duty Cycle
VERR < 0.6V
-
-
0
%
Maximum Duty Cycle (per half-cycle)
VERR = 4.20V, V_RAMP = 0V,
V_CS = 0V (Note 5)
RTD = 2.00kΩ, CT = 220pF
-
94
-
%
-
97
-
%
Zero Duty Cycle VERR Voltage
VERR to PWM Comparator Input Offset
VERR to PWM Comparator Input Gain
Common Mode (CM) Input Range
ERROR AMPLIFIER
Input Common Mode (CM) Range
GBWP
VERR VOL
VERR VOH
VERR Pull-Up Current Source
EA Reference
EA Reference + EA Input Offset Voltage
OSCILLATOR
Frequency Accuracy, Overall
Frequency Variation with VDD
Temperature Stability
Charge Current
Discharge Current Gain
CT Valley Voltage
CT Peak Voltage
CT Pk-Pk Voltage
RTD Voltage
RESDEL Voltage Range
CTBUF Gain (V_CTBUFp-p/V_CTp-p)
CTBUF Offset from GND
CTBUF VOH
RTD = 2.00kΩ, CT = 470pF
T_A = 25°C
(Note 4)
(Note 4)
(Note 4)
I_LOAD = 2mA
I_LOAD = 0mA
VERR = 2.5V
T_A = 25°C
-
0.85
0.7
0.31
0
0
5
-
4.20
0.8
0.594
0.590
99
-
0.8
0.33
-
-
-
-
-
1.0
0.600
0.600
-
1.20
0.9
0.35
V_SS
VREF
-
0.4
-
1.3
0.606
0.612
%
V
V
V/V
V
V
MHz
V
V
mA
V
V
(Note 4)
T_A = 25°C, (F_20V- - F_10V)/F_10V
VDD = 10V, |F_-40°C - F_0°C|/F_0°C
|F_0°C - F_105°C|/F_25°C
(Note 4)
T_A = 25°C
Static Threshold
Static Threshold
Static Value
V_CT = 0.8V, 2.6V
V_CT = 0.8V
∆V(I_LOAD = 0mA, I_LOAD = -2mA),
V_CT = 2.6V
165
-10
-
-
-
-193
19
0.75
2.75
1.92
1.97
0
1.95
0.34
-
183
-
0.3
4.5
1.5
-200
20
0.80
2.80
2.00
2.00
-
2.0
0.40
-
201
+10
1.7
-
-
-207
23
0.88
2.88
2.05
2.03
2
2.05
0.44
0.10
kHz
%
%
%
%
µA
µA/µA
V
V
V
V
V
V/V
V
V
5
FN9182.2
April 4, 2006