ISL6532B Datasheet, PDF (5/15 Pages) Intersil Corporation – ACPI Regulator/Controller for Dual Channel DDR Memory Systems

ISL6532B
Absolute Maximum Ratings
5VSBY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +7V
P12V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . GND - 0.3V to +14V
UGATE, LGATE, NCH . . . . . . . . . . . . . . GND - 0.3V to P12V + 0.3V
All other Pins . . . . . . . . . . . . . . . . . . . GND - 0.3V to 5VSBY + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Level 2
Thermal Information
Thermal Resistance (Typical, Notes 1, 2) θ_JA (^oC/W) θ_JC (^oC/W)
QFN Package . . . . . . . . . . . . . . . . . . .
32
5
Maximum Junction Temperature (Plastic Package) . . . . . . . 150^oC
Maximum Storage Temperature Range . . . . . . . . . . -65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300^oC
Recommended Operating Conditions
Supply Voltage on 5VSBY . . . . . . . . . . . . . . . . . . . . . . . . +5V ±10%
Supply Voltage on P12V . . . . . . . . . . . . . . . . . . . . . . . . +12V ±10%
Supply Voltage on 3V3SBY . . . . . . . . . . . . . . . . . . . . . +3.3V ±10%
Ambient Temperature Range . . . . . . . . . . . . . . . . . . . . 0^oC to 70^oC
Junction Temperature Range . . . . . . . . . . . . . . . . . . . 0^oC to 125^oC
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. θ_JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θ_JC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted. Refer to Block and Simplified Power System
Diagrams and Typical Application Schematics
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNITS
5VSBY SUPPLY CURRENT
Nominal Supply Current
I_{CC_S0}
I_{CC_S3}
S3# & S5# HIGH, UGATE/LGATE Open 3.00 5.25 7.25
mA
S3# LOW, S5# HIGH, UGATE/LGATE
Open
3.50
-
4.75
mA
I_{CC_S5}
S5# LOW, S3# Don’t Care,
UGATE/LGATE Open
300
-
800
µA
POWER-ON RESET
Rising 5VSBY POR Threshold
4.00 - 4.35
V
Falling 5VSBY POR Threshold
3.60 - 3.95
V
Rising P12V POR Threshold
10.0 - 10.5
V
Falling P12V POR Threshold
8.80 - 9.75
V
OSCILLATOR AND SOFT-START
PWM Frequency
Ramp Amplitude
Error Amp Reset Time
VDDQ Soft-Start Interval
REFERENCE VOLTAGE
f_OSC
∆V_OSC
t_RESET
t_SS
S5# LOW to S5# HIGH
S5# LOW to S5# HIGH
220 250 280
kHz
-
1.5
-
V
6.5
-
9.5
ms
6.5
-
9.5
ms
Reference Voltage
System Accuracy
V_REF
- 0.800 -
V
-2.0
-
+2.0
%
PWM CONTROLLER ERROR AMPLIFIER
DC Gain
Guaranteed By Design
-
80
-
dB
Gain-Bandwidth Product
GBWP
15
-
-
MHz
Slew Rate
SR
-
6
-
V/µs
STATE LOGIC
S3# Transition Level
V_S3
S5# Transition Level
V_S5
-
1.5
-
V
-
1.5
-
V
5