ISL6144_07 Datasheet, PDF (5/29 Pages) Intersil Corporation – High Voltage ORing MOSFET Controller

ISL6144
Absolute Maximum Ratings T_A = +25°C
V_IN, V_OUT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to +100V
GATE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_IN +12V
HVREF. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_IN -5V
COMP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_OUT
VSET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to V_OUT -5V
FAULT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3V to 16V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Thermal Information
Thermal Resistance (Typical, Note 1)
θ_JA (°C/W) θ_JC (°C/W)
TSSOP Package (Note 1) . . . . . . . . . .
90
N/A
QFN Package (Notes 3, 4). . . . . . . . . .
35
5
Maximum Junction Temperature (Plastic Package) . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C
Operating Conditions
Supply Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . +10 to +75V
Temperature Range (T_A) . . . . . . . . . . . . . . . . . . . . -40°C to +105°C
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
+150°C max junction temperature is intended for short periods of time to prevent shortening the lifetime. Operation close to +150°C junction may trigger the shutdown of
the device even before +150°C, since this number is specified as typical.
NOTES:
1. θ_JA is measured with the component mounted on a high effective thermal conductivity test board in free air. (See Tech Brief, #TB379.1 for
details.)
2. All voltages are relative to GND, unless otherwise specified.
3. For θ_JC, the "case temp" location is the center of the exposed metal pad on the package underside.
4. θ_JA is measured in free air with the component mounted on a high effective thermal conductivity test board with “die attach” features. (See Tech
Brief, #TB379 for details.)
Electrical Specifications V_IN = 48V, T_A = -40°C to +105°C, Unless Otherwise Specified
PARAMETER
SYMBOL
TEST CONDITIONS
BIAS “V_IN”
POR Rising
12V Bias Current
48V Bias Current
75V Bias Current
GATE
POR_L2H
I_12V
I_48V
I_75V
V_IN Rising to V_GATE > V_IN + 7.5V
V_IN = 12V, V_GATE = V_IN + V_GQP
V_IN = 48V, V_GATE = V_IN + V_GQP
V_IN = 75V, V_GATE = V_IN + V_GQP
Charge Pump Voltage
Gate Low Voltage Level
Low Pull Down Current
High Pull Down Current
V_GQP
V_GL
I_PDL†
(Note 5)
I_PDH†
(Note 5)
V_IN = 12V to 75V
V_IN - V_OUT < 0V
Cgs = 39nF, I_PDL = Cgs * dVgs/T_tofs
Cgs = 39nF, I_PDH = Cgs * dVgs/T_toff
Slow Turn-off Time
Fast Turn-off Time
t_toffs
t_toff
Cgs = 39nF
Turn-off from V_GATE = V_IN + V_GQP to V_IN + 1V with
Cgs = 39nF (includes HS Comparator delay time)
Start-up “Turn-On” Time
GATE Turn-On Current
t_ON
I_ON†
(Note 5)
Turn-on from V_GATE = V_IN to V_IN + 7.5V into 39nF
V_IN = 10V to 75V
CONTROL AND REGULATION I/O
HR Amplifier Forward Voltage
Regulation
HS COMP Externally
Programmable Threshold
V_{FWD_HR}
V_TH(HS)†
(Note 5)
ISL6144 controls voltage across FET Vds to
V_{FWD_HR} during static forward operation at loads
resulting in I * r_DS(ON) < V_{FWD_HR}
Externally programmable threshold for noise
sensitivity (system dependent), typical 0.05 to 0.3V
HS Comparator Offset Voltage
V_OS(HS)
MIN
TYP
MAX UNITS
10
-
-
3.5
-
4.5
-
5
-
V
-
mA
-
mA
-
mA
V_IN + 9 V_IN + 10.5 V_IN + 12 V
-0.3
V_IN V_IN + 0.5 V
-
5
-
mA
-
2
-
A
-
-
100
µs
-
250
300
ns
-
1
-
ms
-
1
-
mA
10
20
30
mV
0
0.05
5.3
V
-40
0
25
mV
5
FN9131.3
February 15, 2007