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ISL54200_07 Datasheet, PDF (5/16 Pages) Intersil Corporation – USB 2.0 High/Full Speed Multiplexer
ISL54200
Electrical Specifications - 2.7V to 3.6V Supply Test Conditions: VDD = +3.3V, GND = 0V, VINH = 1.4V, VINL = 0.5V, VENH = 1.4V,
VENL = 0.5V, (Note 4), Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
TEMP
MIN
MAX
(°C) (Notes 5, 6) TYP (Notes 5, 6) UNITS
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, VINL, VENL
VDD = 2.7V to 3.6V
Full
-
-
0.5
V
Input Voltage High, VINH, VENH VDD = 2.7V to 3.6V
Full
1.4
-
-
V
Input Current, IINL, IENL
VDD = 3.6V, IN = 0V, EN = 0V
Full
-
10
-
nA
Input Current, IINH
VDD = 3.6V, IN = 3.6
Full
-
10
-
nA
Input Current, IENH
VDD = 3.6V, EN = 3.6
Full
-
1
-
μA
NOTES:
4. VLOGIC = Input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Parts are 100% tested at +25°C. Over temperature limits established by characterization and are not production tested.
7. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
8. rON matching between channels is calculated by subtracting the channel with the highest max rON value from the channel with lowest max rON
value, between HSD2 and HSD1 or between FSD2 and FSD1.
Test Circuits and Waveforms
VINH
LOGIC
INPUT
VINL
SWITCH
INPUT
VINPUT
SWITCH
OUTPUT 0V
50%
tOFF
VOUT
90%
tON
tr < 20ns
tf < 20ns
90%
VDD
VINPUT
SWITCH
INPUT
EN
HSx or FSx
IN
VIN
GND
COMx
VOUT
RL
CL
45Ω 10pF
Logic input waveform is inverted for switches that have the opposite
logic sense.
FIGURE 1A. MEASUREMENT POINTS
Repeat test for all switches. CL includes fixture and stray
capacitance.
VOUT
=
V (INPUT)
---------R-----L---------
RL + rON
FIGURE 1. SWITCHING TIMES
FIGURE 1B. TEST CIRCUIT
5
FN6408.1
July 11, 2007