ISL54048_0706 Datasheet, PDF (5/12 Pages) Intersil Corporation – Ultra Low ON-Resistance, +1.65V to +4.5V, Single Supply, Dual SPST Analog Switch

ISL54048, ISL54049
Electrical Specifications - 3V Supply
Test Conditions: V+ = +2.7V to +3.3V, GND = 0V, V_INH = 1.4V, V_INL = 0.5V (Notes 4, 8),
Unless Otherwise Specified. (Continued)
PARAMETER
TEST CONDITIONS
TEMP MIN
MAX
(°C) (NOTE 5) TYP (NOTE 5) UNITS
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
V+ = +3.6V, V_IN = 0V or V+
25
-
0.01
-
μA
Full
-
0.52
-
μA
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V_INL
Input Voltage High, V_INH
Input Current, I_INH, I_INL
V+ = 3.3V, V_IN = 0V or V+
25
-
-
25
1.4
-
Full
-0.5
-
0.5
V
-
V
0.5
μA
Electrical Specifications - 1.8V Supply
Test Conditions: V+ = +1.65V to +2V, GND = 0V, V_INH = 1.0V, V_INL = 0.4V (Notes 4, 8),
Unless Otherwise Specified.
PARAMETER
TEST CONDITIONS
TEMP MIN
MAX
(°C) (NOTE 5) TYP (NOTE 5) UNITS
ANALOG SWITCH CHARACTERISTICS
Analog Signal Range, V_ANALOG
Full
0
ON-Resistance, r_ON
V+ = 1.65V, I_COM = 100mA, V_NO or V_NC = 0V to V+,
25
-
(See Figure 4)
Full
-
-
V+
V
0.7
0.8
Ω
-
0.85
Ω
DYNAMIC CHARACTERISTICS
Turn-ON Time, t_ON
V+ = 1.65V, V_NO or V_NC = 1.0V, R_L =50Ω, C_L = 35pF, 25
-
70
-
ns
(See Figure 1)
Full
-
80
-
ns
Turn-OFF Time, t_OFF
V+ = 1.65V, V_NO or V_NC = 1.0V, R_L =50Ω, C_L = 35pF, 25
-
54
-
ns
(See Figure 1)
Full
-
65
-
ns
Charge Injection, Q
C_L = 1.0nF, V_G = 0V, R_G = 0Ω, (See Figure 2)
25
-
42
-
pC
NO or NC OFF Capacitance, C_OFF f = 1MHz, V_NO or V_NC = V_COM = 0V, (See Figure 6)
25
-
70
-
pF
COM ON Capacitance, C_COM(ON) f = 1MHz, V_NO or V_NC = V_COM = 0V, (See Figure 6)
25
-
186
-
pF
DIGITAL INPUT CHARACTERISTICS
Input Voltage Low, V_INL
25
-
-
0.4
V
Input Voltage High, V_INH
25
1.0
-
-
V
Input Current, I_INH, I_INL
V+ = 2.0V, V_IN = 0V or V+
Full
-0.5
-
0.5
μA
NOTES:
4. V_IN = input voltage to perform proper function.
5. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.
6. Flatness is defined as the difference between maximum and minimum value of on-resistance over the specified analog signal range.
7. r_ON matching between channels is calculated by subtracting the channel with the highest max r_ON value from the channel with lowest max r_ON
value, between Nx1 and Nx2.
8. Parts are 100% tested at +25°C. Limits across full temperature range are guaranteed by design and correlation.
5
FN6469.1
June 11, 2007