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ISL3259E Datasheet, PDF (5/15 Pages) Intersil Corporation – ±15kV ESD Protected, 100Mbps, 5V, PROFIBUS®, Full Fail-safe RS-485/RS-422 Transceivers
ISL3259E
Electrical Specifications Test Conditions: VCC = 4.75V to 5.25V; Unless Otherwise Specified. Typicals are at VCC = 5V, TA = +25°C,
(Note 5). (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
TEMP MIN
MAX
(°C) (Note 14) TYP (Note 14) UNITS
Receiver Input Resistance
Receiver Short-Circuit Current
SUPPLY CURRENT
RIN
IOSR
-7V ≤ VCM ≤ 12V
0V ≤ VO ≤ VCC
Full
54
Full
±20
80
-
kΩ
-
±110
mA
No-Load Supply Current (Note 6)
Shutdown Supply Current
ESD PERFORMANCE
ICC
ISHDN
DI = DE = 0V or VCC
DE = 0V, RE = VCC, DI = 0V or VCC
Full
-
2.6
4
mA
Full
-
0.05
1
µA
RS-485 Pins (A/Y, B/Z)
IEC61000-4-2, Air-Gap Discharge Method
25
-
±15
-
kV
IEC61000-4-2, Contact Discharge Method
25
-
±8
-
kV
Human Body Model, From Bus Pins to GND 25
-
±16.5
-
kV
All Pins
HBM, per MIL-STD-883 Method 3015
25
-
> ±9
-
kV
Machine Model
25
-
> ±400
-
V
DRIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX VOD ≥ ±1.5V, RD = 54Ω, CL = 100pF (Figure 4) Full
100
-
-
Mbps
Driver Differential Output Delay
tDD RD = 54Ω, CD = 50pF (Figure 2)
Full
-
8
12
ns
Driver Differential Output Skew
tSKEW RD = 54Ω, CD = 50pF (Figure 2)
Full
-
0.5
1.5
ns
Prop Delay Part-to-Part Skew
tSKP-P RD = 54Ω, CD = 50pF (Figure 2), (Note 13)
Full
-
-
4
ns
Driver Differential Rise or Fall
Time
tR, tF RD = 54Ω, CD = 50pF (Figure 2)
Full
2
5
8
ns
Driver Enable to Output High
tZH RL = 110Ω, CL = 50pF, SW = GND (Figure 3), Full
-
(Note 8)
13
20
ns
Driver Enable to Output Low
tZL RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), Full
-
(Note 8)
11
20
ns
Driver Enable Time Skew
tENSKEW |tZH (Y or Z) - tZL (Z or Y)|
Full
-
Driver Disable from Output High
tHZ RL = 110Ω, CL = 50pF, SW = GND (Figure 3) Full
-
Driver Disable from Output Low
tLZ RL = 110Ω, CL = 50pF, SW = VCC (Figure 3) Full
-
Driver Disable Time Skew
tDISSKEW |tHZ (Y or Z) - tLZ (Z or Y)|
Full
-
Time to Shutdown
tSHDN (Note 10)
Full
60
Driver Enable from Shutdown to tZH(SHDN) RL = 110Ω, CL = 50pF, SW = GND (Figure 3), Full
-
Output High
(Notes 10, 11)
2.5
-
ns
14
20
ns
12
20
ns
3
-
ns
-
600
ns
-
1000
ns
Driver Enable from Shutdown to tZL(SHDN) RL = 110Ω, CL = 50pF, SW = VCC (Figure 3), Full
-
Output Low
(Notes 10, 11)
-
1000
ns
RECEIVER SWITCHING CHARACTERISTICS
Maximum Data Rate
fMAX VID = ±1.5V
Full
100
-
-
Mbps
Receiver Input to Output Delay tPLH, tPHL (Figure 5)
Full
-
9
13
ns
Receiver Skew | tPLH - tPHL |
tSKD (Figure 5)
Full
-
0
1.5
ns
Prop Delay Part-to-Part Skew
tSKP-P (Figure 5), (Note 13)
Full
-
-
4
ns
Receiver Enable to Output High
tZH RL = 1kΩ, CL = 15pF, SW = GND (Figure 6), Full
-
(Note 9)
-
12
ns
Receiver Enable to Output Low
tZL RL = 1kΩ, CL = 15pF, SW = VCC (Figure 6), Full
-
(Note 9)
-
12
ns
Receiver Disable from Output
tHZ RL = 1kΩ, CL = 15pF, SW = GND (Figure 6) Full
-
High
-
12
ns
5
FN6587.0
November 13, 2007