ISL29001 Datasheet, PDF (5/11 Pages) Intersil Corporation – Light-to-Digital Sensor

ISL29001
Principles of Operation
Photodiodes and ADC
The ISL29001 contains two photodiodes. One of the
photodiodes is sensitive to visible and infrared light (Diode 1)
while the other diode (Diode 2) is used for temperature
compensation (leakage current cancellation) and IR
rejection. The ISL29001 also contains an on-chip integrating
analog-to-digital converter (ADC) to convert photodiode
currents into digital data.
The ADC has three operating modes with two timing controls
(please consult Table 1 for a complete list of modes). In the first
operating mode, the ADC only integrates Diode 1's current and
the digital output format is 16-bit unsigned-magnitude. In
second operating mode, the ADC's operation is the same,
except Diode 2's current is integrated. In the third operating
mode, the ADC integrates Diode 2's current first, then Diode 1's
current. The total integration time is doubled, and the digital
output is the difference of the two photodiode currents (Diode
1’s current - Diode 2’s current). In this mode, the digital output
format is 16-bit 2's-complement. Any of the three operating
modes can be used with either of the two timing controls (either
internally or externally controlled integration timing).
The interface to the ADC is implemented using the standard
I²C interface.
I²C Interface
The ISL29001 contains a single 8-bit command register that
can be written via the I²C interface. The command register
defines the operation of the device, which does not change
until the command register is overwritten.
The ISL29001 contains four 8-bit data registers that can be
read via the I²C interface. The first two data registers contain
the ADC's latest digital output, while the second two
registers contain the number of clock cycles in the previous
integration period.
The ISL29001’s I²C address is hardwired internally as
1000100.
Figure 11A shows a write timing diagram sample. Figure 11B
shows a sample two-byte read. The I²C bus master always
drives the SCL (clock) line, while either the master or the
slave can drive the SDA (data) line. Every I²C transaction
begins with the master asserting a start condition (SDA
falling while SCL remains high). The following byte is driven
by the master, and includes the slave address and read/write
bit. The receiving device is responsible for pulling SDA low
during the acknowledgement period.
Any writes to the ISL29001 overwrite the command register,
changing the device’s mode. Any reads from the ISL29001
return two or four bytes of sensor data and counter value,
depending upon the operating mode. Neither the command
register nor the data registers have internal addresses, and
none of the registers can be individually addressed.
Every I²C transaction ends with the master asserting a stop
condition (SDA rising while SCL remains high).
I²C Transaction Flow
To WRITE, the master sends slave address 44(hex) plus the
write bit. Then master sends the ADC command to the device,
which defines its operation. As soon as the ISL29001 receives
the ADC command, it will execute and then store the readings
in the register after the analog-to-digital conversion is complete.
While the ISL29001 is executing the command and also after
the execution, the I²C bus is available for transactions other
than the ISL29001. After command execution, sensor data
readings are stored in the registers. Note that if a READ is
received before the execution is finished, the data retrieved is
previous data sensor reading. Typical integration/conversion
time is 100ms (for R_EXT = 100k and internal timing mode). It is
recommended that a READ is sent 120ms later because the
F_OSC variation is 20%.
The operation of the device does not change until the
command register is overwritten. Hence, when the master
sends a slave address 44(hex) and a write bit, the ISL29001
will repeat the same command from the previous WRITE
transaction.
To READ, master sends slave address 44(hex) plus the read
bit. Then ISL29001 will hold the SDA line to send data to
master. Note that the master need not send an address
register to access the data. As soon as the ISL29001 receives
the read bit, it will send 4 bytes. The 1st byte is the LSB of the
sensor reading. The 2nd byte is the MSB of the sensor
reading. The 3rd byte is LSB of the counter reading. The 4th
byte is the MSB of the counter reading. If internal timing mode
is selected, only the 1st and 2nd data byte are necessary; the
master can assert a stop after the 2nd data byte is received.
For more information about the I²C standard, please consult
the Philips^® I²C specification documents.
Command Register
The command register is used to define the ADC's operations.
Table 1 shows the primary commands used to control the ADC.
Note that there are two classes of operating commands: three
for internal timing, and three for external (arbitrary) timing.
When using any of the three internal timing commands, the
device self-times each conversion, which is nominally 100ms
(with R_EXT = 100kΩ).
When using any of the three external timing commands,
each command received by the device ends one conversion
and begins another. The integration time of the device is
thus the time between one I²C external timing command and
the next. The integration time can be between 1ms and
100ms. The external timing commands can be used to
synchronize the ADC’s integrating time to a PWM dimming
frequency in a backlight system in order to eliminate noise.
5
FN6166.6
December 10, 2008