ICL7135 Datasheet, PDF (5/15 Pages) Intersil Corporation – 4 1/2 Digit, BCD Output, A/D Converter

ICL7135
Detailed Description
Analog Section
Figure 3 shows the Block Diagram of the Analog Section for
the ICL7135. Each measurement cycle is divided into four
phases. They are (1) auto-zero (AZ), (2) signal-integrate
(INT), (3) de-integrate (DE) and (4) zero-integrator (Zl).
Auto-Zero Phase
During auto-zero, three things happen. First, input high and low
are disconnected from the pins and internally shorted to analog
COMMON. Second, the reference capacitor is charged to the
reference voltage. Third, a feedback loop is closed around the
system to charge the auto-zero capacitor C_AZ to compensate
for offset voltages in the buffer amplifier, integrator, and
comparator. Since the comparator is included in the loop, the
AZ accuracy is limited only by the noise of the system. In any
case, the offset referred to the input is less than 10µV.
Signal Integrate Phase
During signal integrate, the auto-zero loop is opened, the
internal short is removed, and the internal input high and low
are connected to the external pins. The converter then
integrates the differential voltage between IN HI and IN LO for a
fixed time. This differential voltage can be within a wide
common mode range; within one volt of either supply. If, on the
other hand, the input signal has no return with respect to the
converter power supply, IN LO can be tied to analog COMMON
to establish the correct common-mode voltage. At the end of
this phase, the polarity of the integrated signal is latched into
the polarity F/F.
De-Integrate Phase
The third phase is de-integrate or reference integrate. Input
low is internally connected to analog COMMON and input
high is connected across the previously charged reference
capacitor. Circuitry within the chip ensures that the capacitor
will be connected with the correct polarity to cause the inte-
grator output to return to zero. The time required for the out-
put to return to zero is proportional to the input signal.
Specifically the digital reading displayed is:
OUTPUT COUNT
=
10,000



V^---V--_R^---I-_EN^----_F^- _{}
.
Zero Integrator Phase
The final phase is zero integrator. First, input low is shorted
to analog COMMON. Second, a feedback loop is closed
around the system to input high to cause the integrator
output to return to zero. Under normal condition, this phase
lasts from 100 to 200 clock pulses, but after an overrange
conversion, it is extended to 6200 clock pulses.
Differential Input
The input can accept differential voltages anywhere within the
common mode range of the input amplifier; or specifically
from 0.5V below the positive supply to 1V above the negative
supply. In this range the system has a CMRR of 86dB typical.
However, since the integrator also swings with the common
mode voltage, care must be exercised to assure the integrator
output does not saturate. A worst case condition would be a
large positive common-mode voltage with a near full scale
negative differential input voltage. The negative input signal
drives the integrator positive when most of its swing has been
used up by the positive common mode voltage. For these
critical applications the integrator swing can be reduced to
less than the recommended 4V full scale swing with some
loss of accuracy. The integrator output can swing within 0.3V
of either supply without loss of linearity.
Analog COMMON
Analog COMMON is used as the input low return during auto-
zero and de-integrate. If IN LO is different from analog
COMMON, a common mode voltage exists in the system and
is taken care of by the excellent CMRR of the converter.
However, in most applications IN LO will be set at a fixed
known voltage (power supply common for instance). In this
application, analog COMMON should be tied to the same
point, thus removing the common mode voltage from the
converter. The reference voltage is referenced to analog
COMMON.
Reference
The reference input must be generated as a positive voltage
with respect to COMMON, as shown in Figure 4.
V+
REF HI
ICL7135
COMMON
6.8V
ZENER
I_Z
V-
FIGURE 4A.
V+
V+
20kΩ
REF HI
ICL7135
6.8kΩ
ICL8069
1.2V
REFERENCE
COMMON
FIGURE 4B.
FIGURE 4. USING AN EXTERNAL REFERENCE
5
FN3093.3