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HD-6409883 Datasheet, PDF (5/7 Pages) Intersil Corporation – CMOS Manchester Encoder-Decoder
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HD-6409/883
TABLE 3. HD-6409/883 ELECTRICAL PERFORMANCE SPECIFICATIONS (Continued)
LIMITS
PARAMETER
SYMBOL
CONDITIONS
NOTES TEMPERATURE MIN MAX UNITS
Output Fall Time (All except CO)
tf
From 3.5 to 1.0V
CL = 50pF
1, 2 -55oC ≤ TA ≤ +125oC -
50
ns
CO Rise Time
tr
From 1.0 to 3.5V
CL = 20pF
1, 2 -55oC ≤ TA ≤ +125oC -
11
ns
CO Fall Time
tf
From 3.5 to 1.0V
CL = 20pF
1, 2 -55oC ≤ TA ≤ +125oC -
11
ns
ECLK to BZO, BOO
CTS Low to BZO BOO Enabled
CTS Low to ECLK Enabled
CTS High to ECLK Disabled
CTS High to BZO BOO Disabled
UDI to SDO, NVM
RST Low to DCLK, SDO, NVM Low
RST High to DCLK, Enabled
UDI to BZO, BOO
UDI to SDO, NVM
tCE3
tCE4
tCE5
tCE6
tCE7
tCD1
tCD3
tCD4
tR1
tR3
1, 3 -55oC ≤ TA ≤ +125oC 0.5
1.0
1, 3 -55oC ≤ TA ≤ +125oC 0.5
1.5
1, 3 -55oC ≤ TA ≤ +125oC 10.5 11.5
1, 3 -55oC ≤ TA ≤ +125oC -
1.0
1, 3 -55oC ≤ TA ≤ +125oC 1.5
2.5
1, 3 -55oC ≤ TA ≤ +125oC 2.5
3.0
1.3 -55oC ≤ TA ≤ +125oC 0.5
1.5
1, 3 -55oC ≤ TA ≤ +125oC 0.5
1.5
1, 3 -55oC ≤ TA ≤ +125oC 0.5
1.0
1, 3 -55oC ≤ TA ≤ +125oC 2.5
3.0
DBP
DBP
DBP
DBP
DBP
DBP
DBP
DBP
DBP
DBP
NOTES:
1. The parameters listed in Table 3 are controlled via design or process parameters and are not directly tested.
2. Guaranteed via characterization at initial device design and after major process and/or design changes.
3. DBP-Data Bit Period, Clock Rate = 16X, one DBP = 16 Clock Cycles; Clock Rate = 32X, one DBP = 32 Clock Cycles.
CONFORMANCE GROUPS
Initial Test
Interim Test
PDA
Final Test
Group A
Groups C & D
TABLE 4. APPLICABLE SUBGROUPS
METHOD
100%/5004
100%/5004
100%
100%
-
Samples/5005
SUBGROUPS
-
1, 7, 9
1
2, 3, 8A, 8B, 10, 11
1, 2, 3, 7, 8A, 8B, 9, 10, 11
1, 7, 9
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