HD-6409883 Datasheet, PDF (3/7 Pages) Intersil Corporation – CMOS Manchester Encoder-Decoder

HD-6409/883
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +7.0V
Input, Output or I/O Voltage Applied. . . . . GND -0.5V to VCC +0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Temperature Range. . . . . . . . . . . . . . . . -55^oC to +125^oC
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Input Rise and Fall Times. . . . . . . . . . . . . . . . . . . . . . . . . . 50ns Max
Sync. Transition Span (t2) . . . . . . . . . 1.5 DBP Typical, (Notes 1, 2)
Short Data Transition Span (t4) . . . . . 0.5 DBP Typical, (Notes 1, 2)
Long Data Transition Span (t5) . . . . . 1.0 DBP Typical, (Notes 1, 2)
Zero Crossing Tolerance (tCD5) . . . . . . . . . . . . . . . . . . . . . (Note 3)
Thermal Information
Thermal Resistance
θ_JA (^oC/W) θ_JC (^oC/W)
CERDIP Package . . . . . . . . . . . . . . . .
83
23
CLCC Package . . . . . . . . . . . . . . . . . .
95
26
Storage Temperature Range . . . . . . . . . . . . . . . . .-65^oC to +150^oC
Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . +175^oC
Maximum Lead Temperature (Soldering 10s). . . . . . . . . . . . +300^oC
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES:
1. DBP - Data Bit Period. Clock Rate = 16X, one DBP = 16 Clock Cycles; Clock Rate = 32X; one DBP = 32 Clock Cycles.
2. The input conditions specified are nominal values, the actual input waveforms transition spans may vary by ±2 IX clock cycles (16X mode)
or ±6 IX clock cycles (32X mode).
3. The maximum zero crossing tolerance is ±2 IX clock cycles (16X mode) or ±6 IX clock cycles (32X mode) from the nominal.
TABLE 1. HD-6409/883 DC ELECTRICAL PERFORMANCE SPECIFICATIONS
Device Guaranteed and 100% Tested
PARAMETER
GROUP A
SYMBOL CONDITIONS SUBGROUPS
TEMPERATURE
LIMITS
MIN
MAX
UNITS
Logic “1” Input Voltage
VIH
VCC = 4.5V
1, 2, 3
-55^oC ≤ T_A ≤ +125^oC
70%
-
V
VCC
Logic “0” Input voltage
Logic “1” Input Voltage
(RST)
Logic “0” Input Voltage
(RST)
VIL
VIHR
VCC = 4.5V
VCC = 5.5V
VILR VCC = 4.5V
1, 2, 3
1, 2, 3
1, 2, 3
-55^oC ≤ T_A ≤ +125^oC
-
20% VCC V
-55^oC ≤ T_A ≤ +125^oC VCC -0.5
-
V
-55^oC ≤ T_A ≤ +125^oC
-
GND +0.5 V
Logic “1” Input Voltage (IX)
Logic “0” Input Voltage (IX)
Input Leakage Current
(Except IX)
Input Leakage Current (IX)
I/O Leakage Current
VIHC
VlLC
II
II
IO
VCC = 5.5V
VCC = 4.5V
VIN = VCC or
GND
VCC = 5.5V
VlN = VCC or
GND
VCC = 5.5V
VOUT = VCC
or GND
VCC = 5.5V
1, 2, 3
1, 2, 3
1, 2, 3
-55^oC ≤ T_A ≤ +125^oC VCC -0.5
-
V
-55^oC ≤ T_A ≤ +125^oC
-
GND +0.5 V
-55^oC ≤ T_A ≤ +125^oC
-1.0
+1.0
µA
1, 2, 3
-55^oC ≤ T_A ≤ +125^oC
-20
+20
µA
1, 2, 3
-55^oC ≤ T_A ≤ +125^oC
-10
+10
µA
Output HIGH Voltage
(All except OX)
Output LOW Voltage
(All except OX)
VOH IOH = -2.0mA
1, 2, 3
-55^oC ≤ T_A ≤ +125^oC VCC -0.4
-
V
VCC = 4.5V
(Note 1)
VOL IOL = +2.0mA
1, 2, 3
-55^oC ≤ T_A ≤ +125^oC
-
VCC = 4.5V
(Note 1)
0.4
V
137