HC-5509B Datasheet, PDF (5/10 Pages) Intersil Corporation – SLIC Subscriber Line Interface Circuit

HC-5509B3999-003
Pin Descriptions
SOIC
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SYMBOL
DESCRIPTION
AG
Analog Ground - To be connected to zero potential. Serves as a reference for the transmit output and receive
input terminals.
VB+
Positive Voltage Source - most positive supply.
C₁
Capacitor #C₁ - An external capacitor to be connected between this terminal and analog ground. Required for
proper operation of the loop current limiting function.
F1
Function Address #1 - A TTL and CMOS compatible input used with F0 function address line to externally se-
lect logic functions. The three selectable functions are mutually exclusive. See Truth Table on page1. F1 should
be toggled high after power is applied.
F0
Function Address #0 - A TTL and CMOS compatible input used with F1 function address line to externally se-
lect logic functions. The three selectable functions are mutually exclusive. See Truth Table on page 1.
RS
Ring Synchronization Input - A TTL - compatible clock input. The clock is arranged such that a positive pulse
(50 - 500µs) occurs on the zero crossing of the ring voltage source, as it appears at the RFS terminal. For Tip
side injected systems, the RS pulse should occur on the negative going zero crossing and for Ring injected
systems, on the positive going zero crossing. This ensures that the ring delay activates and deactivates when
the instantaneous ring voltage is near zero. If synchronization is not required, the pin should be tied to +5.
SHD
Switch Hook Detection - An active low LS TTL compatible logic output. A line supervisory output.
GKD
Ground Key Detection - An active low LS TTL compatible logic output. A line supervisory output.
TST
A TTL logic input. A low on this pin will set a latch and keep the SLIC in a power down mode until the proper
F1, F0 state is set and will keep ALM low. See Truth Table on page 1.
ALM
A LS TTL compatible active low output which responds to the thermal detector circuit when a safe operating
die temperature has been exceeded. When TST is forced low by an external control signal, ALM is latched low
until the proper F1, F0 state and TST input is brought high. The ALM can be tied directly to the TST pin to
power down the part when a thermal fault is detected and then reset with F0, F1. See Truth Table on page 1.
It is possible to ignore transient thermal overload conditions in the SLIC by delaying the response to the TST
pin from the ALM. Care must be exercised in attempting this as continued thermal overstress may reduced
component life.
I_LMT
Loop Current Limit - Voltage on this pin sets the short loop current limiting conditions using a resistive voltage
divider.
OUT1 The analog output of the spare operational amplifier.
-IN1
The inverting analog input of the spare operational amplifier.
TIP
An analog input connected to the TIP (more positive) side of the subscriber loop through a feed resistor and
ring relay contact. Functions with the RING terminal to receive voice signals from the telephone and for loop
monitoring purpose.
RING
An analog input connected to the RING (more negative) side of the subscriber loop through a feed resistor.
Functions with the TIP terminal to receive voice signals from the telephone and for loop monitoring purposes.
RFS
Ring Feed Sense - Senses RING side of the loop for Ground Key Detection. During Ring injected ringing the
ring signal at this node is isolated from RF via the ring relay. For Tip injected ringing, the RF and RFS pins
must be shorted.
VRX
Receive Input, 4-Wire Side - A high impedance analog input. AC signals appearing at this input drive the Tip
Feed and Ring Feed amplifiers differentially.
C₂
Capacitor #C₂ - An external capacitor to be connected between this terminal and ground. It prevents false ring
trip detection from occurring when longitudinal currents are induced onto the subscriber loop from power lines
and other noise sources. This capacitor should be nonpolarized.
VTX
Transmit Output, 4-Wire Side - A low impedance analog output which represents the differential voltage across
TIP and RING. Transhybrid balancing must be performed beyond this output to completely implement 2-Wire
to 4-Wire conversion. This output is referenced to analog ground. Since the DC level of this output varies with
loop current, capacitive coupling to the next stage is necessary.
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