CD4010BMS Datasheet, PDF (5/8 Pages) Intersil Corporation – CMOS Hex Buffer/Converter

CD4010BMS
TABLE 6. APPLICABLE SUBGROUPS
CONFORMANCE GROUP
MIL-STD-883
METHOD
GROUP A SUBGROUPS
Initial Test (Pre Burn-In)
100% 5004
1, 7, 9
Interim Test 1 (Post Burn-In)
100% 5004
1, 7, 9
Interim Test 2 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Interim Test 3 (Post Burn-In)
100% 5004
1, 7, 9
PDA (Note 1)
100% 5004
1, 7, 9, Deltas
Final Test
100% 5004
2, 3, 8A, 8B, 10, 11
Group A
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Group B
Subgroup B-5
Sample 5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11, Deltas
Subgroup B-6
Sample 5005
1, 7, 9
Group D
Sample 5005
1, 2, 3, 8A, 8B, 9
NOTE:
1. 5% Parameteric, 3% Functional; Cumulative for Static 1 and 2.
READ AND RECORD
IDD, IOL5, IOH5A, RON
IDD, IOL5, IOH5A, RON
IDD, IOL5, IOH5A, RON
IDD, IOL5, IOH5A, RON
Subgroups 1, 2, 3, 9, 10, 11
Subgroups 1, 2 3
CONFORMANCE GROUPS
Group E Subgroup 2
TABLE 7. TOTAL DOSE IRRADIATION
MIL-STD-883
METHOD
TEST
PRE-IRRAD
POST-IRRAD
5005
1, 7, 9
Table 4
READ AND RECORD
PRE-IRRAD
POST-IRRAD
1, 9
Table 4
TABLE 8. BURN-IN AND IRRADIATION TEST CONNECTIONS
OSCILLATOR
FUNCTION
OPEN
GROUND
VDD
9V ± -0.5V
50kHz
25kHz
Static Burn-In 1 (Note 1) 2, 4, 6, 10, 12, 13, 15 3, 5, 7 - 9, 11, 14
1, 16
Static Burn-In 2 (Note 1) 2, 4, 6, 10, 12, 13, 15
8
1, 3, 5, 7, 9, 11, 14, 16
Dynamic Burn-In (Note 3)
13
8
1, 16
2, 4, 6, 10, 12, 15 3, 5, 7, 9, 11, 14
Irradiation (Note 2)
2, 4, 6, 10, 12, 13, 15
8
1, 3, 5, 7, 9, 11, 14, 16
NOTES:
1. Each pin except VDD and Pin 1 and GND will have a series resistor of 10K ± 5%, VDD = 18V ± 0.5V
2. Each pin except VDD and Pin 1 and GND will have a series resistor of 47K ± 5%; Group E, Subgroup 2, sample size is 4 dice/wafer, 0 failures,
VDD = 10V ± 0.5V
3. Each pin except VDD and Pin 1 and GND will have a series resistor of 4.75K ± 5%, VDD = 18V ± 0.5V
Schematic Diagram
VDD
VCC
CONFIGURATION:
HEX COS/MOS TO DTL OR TTL
CONVERTER (NON-INVERTING)
P
N
*ALL INPUTS ARE PROTECTED
BY CMOS PROTECTION
NETWORK
VDD
P
*
INPUT
VDD
GND
N
OUTPUT
VCC
GND
N
VSS
WIRING SCHEDULE:
CONNECT VCC TO DTL OR
TTL SUPPLY
CONNECT VDD TO COS/MOS
SUPPLY
VSS
4-5