CA3306 Datasheet, PDF (5/16 Pages) Intersil Corporation – 6-Bit, 15 MSPS, Flash A/D Converters

CA3306, CA3306A, CA3306C
Timing Waveforms
COMPARATOR DATA IS LATCHED
DECODED DATA IS SHIFTED TO OUTPUT REGISTERS
CLOCK IF
PHASE IS HIGH
φ2
φ1
φ2
φ1
φ2
CLOCK IF
PHASE IS LOW
DATA
N-2
AUTO
BALANCE
SAMPLE
N+1
t_D
t_H
AUTO
BALANCE
SAMPLE
N+2
DATA
N-1
DATA
N
FIGURE 1. INPUT-TO-OUTPUT
CE1
CE2
t_DIS
t_EN
BITS 1-6
DATA
HIGH
IMPEDANCE
t_DIS
DATA
t_DIS
HIGH
IMPEDANCE
DATA
OF
DATA
HIGH
IMPEDANCE
DATA
FIGURE 2. OUTPUT ENABLE
SAMPLE ENDS
CLOCK
φ2
φ1
t_D
OUTPUT
OLD DATA
FIGURE 3A.
CLOCK
φ2
SAMPLE ENDS
φ2
CLOCK φ 1
φ2
φ1
φ2
NEW DATA _OUTPUT
OLD
DATA
t_D
OLD
DATA +1
SAMPLE ENDS
φ1
φ2
φ1
FIGURE 3B.
φ2
OUTPUT
t_D
OLD DATA
INVALID
DATA
FIGURE 3C.
FIGURE 3. PULSE MODE
NEW
DATA
φ1
NEW
DATA
4-12