AN1556.0 Datasheet, PDF (5/10 Pages) Intersil Corporation – Building an Accurate SPICE Model for Low Noise

Application Note 1556
Common Mode Gain Stage
The Common Mode Gain Stage consists of two VCCS's
that drive two equal resistors in series with an inductor
connected to the supply rails. The inductors simulate the
typical fall-off of CMRR that most amplifiers exhibit as the
input frequency is increased. The current sources are
controlled by the input common mode voltage
(generated by resistors R₁ and R₂ in the Input Stage)
relative to the mid supply voltage. Each control source
has a g_m equal to the reciprocal of the associated
resistor value divided by the CMRR of the amplifier at DC
(Equation 10). The inductors add a zero to the
common-mode gain, which is equivalent to adding a pole
to the CMRR. The common-mode voltage, after being
scaled and appropriately frequency shaped, is then added
back into the Input Stage via the VCVS called EOS.
Supply Isolation Stage
The Supply Isolation Stage consists of two VCVS's and a
current source. This stage enables the user to program
the total supply current of the amplifier with just one
entry in the node list. It also isolates the internal supply
currents from the external supply current seen by the
user. This enables the model to provide the correct
supply current for low power amplifiers with low voltage
noise.
Output Stage
The operation of the Output Stage is not entirely obvious.
The amplifier's output signal, after receiving all the
appropriate frequency shaping, appears as a voltage
referenced to mid supply at the inputs to G₇ and G₈. G₇
and G₈ drive two equal resistors connected to the supply
rails and act as active current generators. Both G₇ and
G₈ generate just enough current to provide the desired
voltage drop across its parallel resistor. Refer to the
section “How the VCCS Output Stage Works” on page 6.
When there is no load on the output, the model draws no
current from either supply rail, thus behaving like an
amplifier output. Simulating the right output resistance
means the DC open loop gain will be properly reduced as
the amplifier is loaded.
When a load is applied to the output, equal currents will
be pulled from both supply rails. To make the output
behave like a real amplifier, G₉ and G₁₀ force the
appropriate amount of current to make it appear as if all
the current is being sourced or sunk from the correct
supply.
Output short circuit protection is provided by diodes D₆
and D₇ along with DC supplies V₅ and V₆. Under fault
conditions, the output voltage is clamped to the previous
frequency shaping stage. The output short circuit current
limit is determined by adjusting the value of V₅ and V₆.
How the VCCS Stage Works
When the voltage at the inputs to G₁ and G₂ (Figure 5)
increases, the resultant voltage at the Midpoint will rise.
Likewise, when the voltage at the inputs decrease, the
midpoint voltage will decrease. If the g_m of the stage is
equal to the reciprocal of the parallel resistor, the stage
has a positive unity gain.
V₊₊
V
+
-
G1 ₁₀
+
-
INPUT VOLTAGE GOES UP
• CURRENT GOES UP
-
R5
• NET CURRENT THROUGH R5
DROPS
+ ^1Ω • MIDPOINT VOLTAGE GOES UP
11 _{MIDPOINT VOLTAGE}
INPUT VOLTAGE GOES UP
G2
+ _R6
• CURRENT GOES UP
-
1Ω
• NET CURRENT THROUGH R6
GOES UP
12
V_--
• MIDPOINT VOLTAGE GOES UP
FIGURE 5. HOW THE VCCS WORKS
The single-ended equivalent circuit of Figure 5 is shown
in Figure 6. The circuit shown in Figure 6 is sometimes
easier to help visualize the signal flow through the
stages.
MIDPOINT VOLTAGE
V
+
-
+ _R#
1Ω
-
12
FIGURE 6. SINGLE-ENDED EQUIVALENT CIRCUIT TO FIGURE 5
5
AN1556.0
April 19, 2010