82C84A Datasheet, PDF (5/10 Pages) Intersil Corporation – CMOS Clock Generator Driver

82C84A
Absolute Maximum Ratings
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +8.0V
Input, Output or I/O Voltage . . . . . . . . . . . GND -0.5V to V_CC +0.5V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 1
Operating Conditions
Operating Voltage Range . . . . . . . . . . . . . . . . . . . . . +4.5V to +5.5V
Operating Temperature Range
C82C84A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0^oC to +70^oC
I82C84A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -40^oC to +85^oC
M82C84A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55^oC to +125^oC
Thermal Information
Thermal Resistance . . . . . . . . . . . . . . . . θ_JA (^oC/W) θ_JC (^oC/W)
CERDIP Package . . . . . . . . . . . . . . . .
80
20
CLCC Package . . . . . . . . . . . . . . . . . .
95
28
PDIP Package . . . . . . . . . . . . . . . . . . .
85
N/A
PLCC Package . . . . . . . . . . . . . . . . . .
85
N/A
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65^oC to +150^oC
Max Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . +175^oC
Lead Temperature (Soldering 10s) . . . . . . . . . . . . . . . . . . . . +300^oC
(PLCC - Lead Tips Only)
Die Characteristics
Gate Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 Gates
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation
of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
DC Electrical Specifications V_CC = +5.0V ±10%,
T_A = 0^oC to +70^oC (C82C84A),
T_A = -40^oC to +85^oC (I82C84A),
T_A = -55^oC to +125^oC (M82C84A)
SYMBOL
PARAMETER
MIN
MAX
UNITS
TEST CONDITIONS
V_IH Logical One Input Voltage
2.0
-
2.2
V
C82C84A, I82C84
V
M82C84A, Notes 1, 2
V_IL
Logical Zero Input Voltage
V_IHR Reset Input High Voltage
V_ILR Reset Input Low Voltage
VT+ - VT- Reset Input Hysteresis
V_OH Logical One Output Current
V_OL Logical Zero Output Voltage
II
Input Leakage Current
-
0.8
V_CC -0.8
-
-
0.5
0.2 V_CC
-
V_CC -0.4
-
-
0.4
-1.0
1.0
V
Notes 1, 2, 3
V
V
-
V
I_OH = -4.0mA for CLK Output
I_OH = -2.5mA for All Others
V
I_OL = +4.0mA for CLK Output
I_OL = +2.5mA for All Others
µA
V_IN = V_CC or GND except ASYNC,
X1: (Note 4)
I_CCOP Operating Power Supply Current
-
40
mA
Crystal Frequency = 25MHz
Outputs Open, Note 5
NOTES:
1. F/C is a strap option and should be held either ≤ 0.8V or ≥ 2.2V. Does not apply to X1 or X2 pins.
2. Due to test equipment limitations related to noise, the actual tested value may differ from that specified, but the specified limit is
guaranteed.
3. CSYNC pin is tested with V_IL ≤ 0.8V.
4. ASYNC pin includes an internal 17.5kΩ nominal pull-up resistor. For ASYNC input at GND, ASYNC input leakage current = 300µA
nominal, X1 - crystal feedback input.
5. f = 25MHz may be tested using the extrapolated value based on measurements taken at f = 2MHz and f = 10MHz.
Capacitance T_A = +25^oC
SYMBOL
PARAMETER
TYPICAL
UNITS
TEST CONDITIONS
C_IN
C_OUT
Input Capacitance
Output Capacitance
10
pF
FREQ = 1MHz, all measurements are
referenced to device GND
15
pF
4-291