X9317_09 Datasheet, PDF (4/15 Pages) Intersil Corporation – Digitally Controlled Potentiometer (XDCP™)

X9317
Ordering Information (Continued)
PART NUMBER
V_CC LIMITS
PART MARKING
(V)
R_TOTAL
(kΩ)
TEMPERATURE
RANGE (°C)
PACKAGE
PKG.
DWG. #
X9317WS8IZ-2.7* (Note 1)
X9317W ZG
2.7 to 5.5
10
-40 to +85 8 Ld SOIC (Pb-free) M8.15E
X9317WV8-2.7* (Note 2)
317W F
0 to +70
8 Ld TSSOP
M8.173
X9317WV8Z-2.7* (Note 1)
9317W FZ
0 to +70
8 Ld TSSOP (Pb-free) M8.173
X9317WV8I-2.7*, ** (Note 2) 317W G
-40 to +85 8 Ld TSSOP
M8.173
X9317WV8IZ-2.7* (Note)
AKZ
-40 to +85 8 Ld TSSOP (Pb-free) M8.173
X9317UM8-2.7* (Note 2)
AED
0 to +70
8 Ld MSOP
M8.118
X9317UM8Z-2.7* (Note 1)
AOB
0 to +70
8 Ld MSOP (Pb-free) M8.118
X9317UM8I-2.7*, ** (Note 2) AFF
-40 to +85 8 Ld MSOP
M8.118
X9317UM8IZ-2.7* (Note 1)
AOH
-40 to +85 8 Ld MSOP (Pb-free) M8.118
X9317US8-2.7* (Note 2)
X9317U F
50
0 to +70
8 Ld SOIC
M8.15E
X9317UP-2.7 (Note 2)
X9317UP F
0 to +70
8 Ld PDIP
MDP0031
X9317UPI-2.7 (Note 2)
X9317UP G
-40 to +85 8 Ld PDIP
MDP0031
X9317US8Z-2.7* (Note 1)
X9317U ZF
0 to +70
8 Ld SOIC (Pb-free) M8.15E
X9317US8I-2.7*, ** (Note 2) X9317U G
-40 to +85 8 Ld SOIC
M8.15E
X9317US8IZ-2.7* (Note 1)
X9317U ZG
-40 to +85 8 Ld SOIC (Pb-free) M8.15E
X9317UV8-2.7* (Note 2)
317U F
0 to +70
8 Ld TSSOP
M8.173
X9317UV8Z-2.7* (Note 1)
9317U FZ
0 to +70
8 Ld TSSOP (Pb-free) M8.173
X9317UV8I-2.7*, ** (Note 2) 317U G
-40 to +85 8 Ld TSSOP
M8.173
X9317UV8IZ-2.7* (Note 1)
9317U GZ
-40 to +85 8 Ld TSSOP (Pb-free) M8.173
X9317TM8-2.7*, ** (Note 2) AGE
100
0 to +70
8 Ld MSOP
M8.118
X9317TM8Z-2.7* (Note 1)
DCP
0 to +70
8 Ld MSOP (Pb-free) M8.118
X9317TM8I-2.7*, ** (Note 2) AGG
-40 to +85 8 Ld MSOP
M8.118
X9317TM8IZ-2.7* (Note 1)
DCM
-40 to +85 8 Ld MSOP (Pb-free) M8.118
X9317TP-2.7 (Note 2)
X9317TP F
0 to +70
8 Ld PDIP
MDP0031
X9317TPI-2.7 (Note 2)
X9317TP G
-40 to +85 8 Ld PDIP
MDP0031
X9317TS8-2.7*, ** (Note 2) X9317T F
0 to +70
8 Ld SOIC
M8.15E
X9317TS8Z-2.7* (Note 1)
X9317T ZF
0 to +70
8 Ld SOIC (Pb-free) M8.15E
X9317TS8I-2.7*, ** (Note 2) X9317T G
-40 to +85 8 Ld SOIC
M8.15E
X9317TS8IZ-2.7* (Note 1)
X9317T ZG
-40 to +85 8 Ld SOIC (Pb-free) M8.15E
X9317TV8-2.7*, ** (Note 2) 317T F
0 to +70
8 Ld TSSOP
M8.173
X9317TV8Z-2.7* (Note 1)
9317T FZ
0 to +70
8 Ld TSSOP (Pb-free) M8.173
X9317TV8I-2.7*, ** (Note 2) 317T G
-40 to +85 8 Ld TSSOP
M8.173
X9317TV8IZ-2.7* (Note 1)
9317T GZ
-40 to +85 8 Ld TSSOP (Pb-free) M8.173
*Add "T1" suffix for tape and reel. Please refer to TB347 for details on reel specifications.
**Add "T2" suffix for tape and reel. Please refer to TB347 for details on reel specifications.
NOTES:
1. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100%
matte tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations).
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC
J STD-020.
2. Not recommended for new designs.
4
FN8183.6
December 16, 2009