ISL6226 Datasheet, PDF (4/17 Pages) Intersil Corporation – Advanced PWM and Linear Power Controller for Portable Applications

ISL6226
PARAMETER
LINEN-High (ON)
Input Bias Current LINCS1 and LINCS2
Input Bias Current LINVS
SYMBOL
TEST CONDITIONS
Ibias1
Ibias2
Vlincs = 0.8 V
Vlinvs = 0.8 V
MIN TYP MAX UNITS
2.0
-
-
V
-
-80
-
nA
-
-80
-
nA
Functional Pin Descriptions
VIN (Pin 1)
Provides battery voltage to the oscillator for feed-forward
rejection of the input voltage variation. Also, this pin programs
frequency of the internal clock and gain of the ramp generator.
PGOODL (Pin 2)
PGOODL is an open drain output used to indicate the status of
the LDO output voltages. This pin is pulled low when the output
voltage is not within of its respective nominal voltage or over
120mV between pin 8 and 9.
PWMEN (Pin 3)
This pin provides enable/disable function the PWM output.
The output is enabled when this pin is high. The PWM output
is held off when this pin is pulled to ground. Intersil
recommends to use hysteresis mode when input voltage
higher than 18V and output voltage is 1.25V or less.
OCSET (Pin 4)
A resistor on this pin to ground sets the over current
threshold for the PWM controller.
LINEN (Pin 5)
This pin provides enable/disable function and soft-start for
the LDO. The output is enabled when this pin is high. The
LDO is held off when this pin is pulled to ground.
VCC (Pin 6)
Input power for the controller and the upper MOSFET gate
drive. The IC starts to operate when the voltage on this pin
exceeds 4.3V and stops operating when the voltage on this
pin drops below approximately 4.45V.
LINDR (Pin 7)
Current output to drive the NPN transistor.
LINCS1 (Pin 8)
High side of current sense resistor.
LINCS2 (Pin 9)
Low side of current sense resistor. Current limit for the linear
regulator is initiated when the voltage difference between
LINCS1 and LINCS2 is 120mV.
SSLIN (Pin 10)
This pin provides soft start of the LDO controller. When the EN
pin is pulled high, the voltage on the capacitor connected to
the soft start pin is rising linearly due to the 5 µA pull-up
current. The output voltage follows the voltage on the
capacitor till it reaches the value of 0.8V. At this moment the
output voltage starts to regulate and soft start continues to rise
to 1.5V. At this time, the soft start is complete and the
PGOODL will be high to indicate the output voltage within its
respective nominal voltage. The further rise of soft start
capacitor does not affect the output voltage. The soft-start
time can be obtained from the following equation.
Tsslin = ^{1----.--5---5V---}_µ--x--A-C-----s----s-
LINVS (Pin 11)
Voltage regulation point (0.8V) for the linear output.
GND (Pin 12)
Signal ground for the IC. All voltage levels are measured
with respect to this pin.
PGND (Pin 13)
This is the lower MOSFET gate drive return connection for
PWM converter. Tie the lower MOSFET source directly to
this pin.
LGATE (Pin 14)
This pin provides the gate drive for the lower MOSFET.
Connect the lower MOSFET gate to this pin.
PVCC (Pin 15)
This pin powers the lower MOSFET gate driver.
SSPWM (Pin 16)
This pin provides soft start of the PWM controller. This pin has
the same function as SSLIN pin. When the EN pin is pulled
high, the voltage on the capacitor connected to the soft start
pin is rising linearly due to the 5 µA pull-up current. The
output voltage follows the voltage on the capacitor till it
reaches the value of 0.9V. At this moment the output voltage
starts to regulate and soft start continues to rise to 1.5V. At this
time, the soft start is complete and the PGOODPWM will be
high to indicate the output voltage within its respective
nominal voltage. The further rise of soft start capacitor does
not affect the output voltage. The soft-start time can be
obtained from the following equitation.
Tsspwm = ^{1----.--5---5V---}_µ--x--A-C-----s---s--
PHASE (Pin17)
The phase node is the junctions of the upper MOSFET
source, output filter inductor, and lower MOSFET drain.
Connect the PHASE pin directly to the PWM converter’s lower
MOSFET drain.
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