ISL1208_06 Datasheet, PDF (4/21 Pages) Intersil Corporation – Low Power RTC with Battery Backed SRAM

ISL1208
Serial Interface Specifications Over the recommended operating conditions unless otherwise specified. (Continued)
SYMBOL
PARAMETER
TEST CONDITIONS
TYP
MIN (Note 4) MAX UNITS NOTES
Cpin
f_SCL
t_IN
SDA and SCL Pin Capacitance
SCL Frequency
T_A = 25°C, f = 1MHz, V_DD = 5V,
V_IN = 0V, V_OUT = 0V
Pulse width Suppression Time at SDA Any pulse narrower than the max spec
and SCL Inputs
is suppressed.
10
pF
400
kHz
50
ns
t_AA
SCL Falling Edge to SDA Output Data SCL falling edge crossing 30% of V_DD,
Valid
until SDA exits the 30% to 70% of V_DD
window.
900
ns
t_BUF
Time the Bus Must Be Free Before the SDA crossing 70% of V_DD during a
1300
ns
Start of a New Transmission
STOP condition, to SDA crossing 70%
of V_DD during the following START
condition.
t_LOW
t_HIGH
t_SU:STA
Clock LOW Time
Clock HIGH Time
START Condition Setup Time
t_HD:STA START Condition Hold Time
t_SU:DAT Input Data Setup Time
t_HD:DAT Input Data Hold Time
t_SU:STO STOP Condition Setup Time
t_HD:STO STOP Condition Hold Time
t_DH
Output Data Hold Time
t_R
SDA and SCL Rise Time
Measured at the 30% of V_DD crossing. 1300
Measured at the 70% of V_DD crossing. 600
SCL rising edge to SDA falling edge.
600
Both crossing 70% of V_DD.
From SDA falling edge crossing 30% of 600
V_DD to SCL falling edge crossing 70%
of V_DD.
From SDA exiting the 30% to 70% of
100
V_DD window, to SCL rising edge
crossing 30% of V_DD
From SCL falling edge crossing 30% of 20
V_DD to SDA entering the 30% to 70%
of V_DD window.
From SCL rising edge crossing 70% of 600
V_DD, to SDA rising edge crossing 30%
of V_DD.
From SDA rising edge to SCL falling
600
edge. Both crossing 70% of V_DD.
From SCL falling edge crossing 30% of
0
V_DD, until SDA enters the 30% to 70%
of V_DD window.
From 30% to 70% of V_DD
20 +
0.1 x Cb
ns
ns
ns
ns
ns
900
ns
ns
ns
ns
300
ns
t_F
SDA and SCL Fall Time
From 70% to 30% of V_DD
20 +
0.1 x Cb
300
ns
Cb
Capacitive Loading of SDA or SCL Total on-chip and off-chip
10
400
pF
Rpu
SDA and SCL Bus Pull-Up Resistor Maximum is determined by t_R and t_F.
1
kΩ
Off-Chip
For Cb = 400pF, max is about 2~2.5kΩ.
For Cb = 40pF, max is about 15~20kΩ
NOTES:
1. IRQ & F_OUT Inactive.
2. LPMODE = 0 (default).
3. In order to ensure proper timekeeping, the V_{DD SR-} specification must be followed.
4. Typical values are for T = 25°C and 3.3V supply voltage.
4
FN8085.5
August 23, 2006