HA4244 Datasheet, PDF (4/6 Pages) Intersil Corporation – 480MHz, 1 x 1 Video Crosspoint Switch with Synchronous Enable

HA4244
Application Information
General
The HA4244 is a synchronous 1 x 1 crosspoint switch that is
ideal for the matrix element in small, high input-to-output
isolation switchers and routers. The HA4244’s low input
capacitance and high input resistance provide excellent
video terminations when used with an external 75Ω resistor.
This crosspoint contains no feedback or gain setting
resistors, so the output is a true high impedance load when
the IC is disabled (EN = 0).
Synchronizing Latches
The HA4244 contains two latches which gate the EN input,
thereby allowing all the crosspoints in a matrix to switch
states synchronously. The latches also allow the EN input to
be changed without affecting the current state of the
HA4244. Thus, the next channel switch can be set up, and
isn’t acted upon until the next rising CLK edge. As long as
the EN signals meet a setup and hold time relative to the
rising CLK edge, all of the HA4244s will assume their new
state at the same time.
Power-Up Disable Function
The double latched EN signal, and single CLK input prevent
the user from controlling the crosspoint state at power-up.
To rectify this situation, the HA4244 incorporates power-up
circuitry to ensure that the crosspoint powers up in the
disabled state. Disabling the HA4244 prevents bus
contention between multiplexed outputs, and minimizes the
switching matrix supply current during power-up. Consider,
for example, a matrix of 625 crosspoints that power-up
randomly. If 50% of them power-up enabled, the required
matrix supply current is 3.3A (313 x 10.5mA), neglecting
output current. If HA4244s are utilized the power-up current
is reduced to 0.125A (625 x 200µA).
Frequency Response
Most applications utilizing the HA4244 require a series
output resistor, R_S, to tune the response for the specific load
capacitance, C_L, driven. Bandwidth and slew rate degrade
as C_L increases (as shown in the Electrical Specification
table), so give careful consideration to component
placement to minimize trace length. As an example, -3dB
bandwidth decreases to 160MHz for C_L = 100pF, R_S = 0Ω.
In big matrix configurations where C_L is large, better
frequency response is obtained by cascading two levels of
crosspoints in the case of multiplexed outputs, or distributing
the load between two drivers if C_L is due to bussing and
subsequent stage input capacitance.
Control Signals
EN - The ENABLE input is a TTL/CMOS compatible, active
high input. When driven low this input forces the output to a
true high impedance state and reduces the power
dissipation by two orders of magnitude.
CLK - An active high, TTL/CMOS compatible input that
controls the synchronizing latches. When CLK transistions
low, the current state of the EN input is latched in the IC.
This allows the EN input to be changed to the value
correspending to the next channel switch, without affecting
the HA4244’s current state. The HA4244 assumes the new
state on the next rising edge of CLK.
Power Up Considerations
No signals should be applied to the digital inputs before the
power supplies are activated. Latch-up may occur if the
inputs are driven at the time of power up. To prevent latch-
up, the input currents during power up must not exceed the
values listed in the Absolute Maximum Ratings.
Harris’ Crosspoint Family
Harris offers a variety of 1 x 1 and 4 x 1 crosspoint switches. In
addition to the HA4244, the 1 x 1 family includes the HA4600,
which is an essentially similar device but without the
synchronizing latches, and the HA4201 asynchronous
crosspoint with a Tally output (enable indicator). The 4 x 1
family is comprised of the HA4314, HA4404, and HA4344. The
HA4314 is a 14 lead basic 4 x 1 crosspoint. The HA4404 is a 16
lead device with Tally outputs to indicate the selected channel.
The HA4344 is a 16 lead crosspoint with synchronized control
lines (A0, A1, CS). With synchronization, the control information
for the next channel switch can be loaded into the crosspoint
without affecting the current state. On a subsequent clock edge
the stored control state effects the desired channel switch.
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