DG441 Datasheet, PDF (4/10 Pages) Intersil Corporation – Monolithic, Quad SPST, CMOS Analog Switches

DG441, DG442
Electrical Specifications
PARAMETER
(Single Supply) Test Conditions: V+ = 12V, V- = 0V, V_IN = 2.4V, 0.8V, Unless Otherwise Specified
TEST CONDITIONS
TEMP
(^oC)
(NOTE 3)
MIN
TYP
MAX
DYNAMIC CHARACTERISTICS
Turn-ON Time, t_ON
R_L = 1kΩ, C_L = 35pF, V_S = 8V, (Figure 1)
Turn-OFF Time, t_OFF
Charge Injection, Q (Figure 2)
C_L = 1nF, V_G = 6V, R_G = 0Ω
ANALOG SWITCH CHARACTERISTICS
25
-
300
450
25
-
60
200
25
-
2
-
Analog Signal Range, V_ANALOG
Drain-Source ON Resistance,
r_DS(ON)
I_S = 10mA, V_D = 3V, 8V V+ = 10.8V
Full
0
25
-
Full
-
-
12
100
160
-
200
POWER SUPPLY CHARACTERISTICS
Positive Supply Current, I+
Negative Supply Current, I-
V+ = 13.2V, V- = 0V, V_IN = 0V or 5V
Full
-
15
100
25
-1
-0.0001
-
Full
-100 -0.0001
-
Ground Current, I_GND
NOTES:
3. Typical values are for DESIGN AID ONLY, not guaranteed nor production tested.
Full
-100
-15
-
UNITS
ns
ns
pC
V
Ω
Ω
µA
µA
µA
µA
Test Circuits and Waveforms
V_O is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing
edge of the output waveform.
3V
LOGIC
INPUT
0V
50%
t_OFF
t_r < 20ns
t_f < 20ns
SWITCH
INPUT
S₁
IN₁
V+
D₁
V_O
SWITCH
INPUT
V_S
SWITCH
OUTPUT _0V
V_O
80%
t_ON
80%
NOTE: Logic input waveform is inverted for switches that have the
opposite logic sense.
LOGIC
INPUT
3V
GND
R_L
C_L
V-
Repeat test for Channels 2, 3 and 4.
For load conditions, see Specifications. C_L includes fixture and stray
capacitance.
V_O
=
V_S
---------------^R-----^L----------------
R_L + r_DS(ON)
FIGURE 1A. MEASUREMENT POINTS
FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
4