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CD22202 Datasheet, PDF (4/6 Pages) Intersil Corporation – 5V Low Power DTMF Receiver
CD22202, CD22203
3.579545MHz
1M
XIN
XOUT
VDD
12
11
ATB
13
CD22202/22203
8
XEN
XIN CONNECTED TO VDD
12
DV remains high until a valid pause occurs or CLRDV is
raised high, whichever is sooner. This handshake can save
microprocessor time.
DTMF Dialing Matrix
ROW 0
697Hz
ROW 1
770Hz
COL 0
1209Hz
1
4
COL 1
1336Hz
2
5
COL 2
1477Hz
3
6
COL 3
1633Hz
A
B
13 CD22202/22203
XEN
8
ROW 2
852Hz
7
8
9
C
UP TO 10 DEVICES
FIGURE 2. CRYSTAL OSCILLATOR
HEX/B28
This pin selects the format of the digital output code. When
HEX/B28 is tied high, the output is hexadecimal. When tied
low, the output is binary coded 2-of-8. The following table
describes the two output codes.
TABLE 1. OUTPUT CODES
DIGIT
1
2
3
4
5
6
7
8
9
0
*
#
A
B
C
D
HEXADECIMAL
D8 D4 D2 D1
0
0
0
1
0
0
1
0
0
0
1
1
0
1
0
0
0
1
0
1
0
1
1
0
0
1
1
1
1
0
0
0
1
0
0
1
1
0
1
0
1
0
1
1
1
1
0
0
1
1
0
1
1
1
1
0
1
1
1
1
0
0
0
0
BINARY CODED 2-OF-8
D8 D4 D2 D1
0
0
0
0
0
0
0
1
0
0
1
0
0
1
0
0
0
1
0
1
0
1
1
0
1
0
0
0
1
0
0
1
1
0
1
0
1
1
0
1
1
1
0
0
1
1
1
0
0
0
1
1
0
1
1
1
1
0
1
1
1
1
1
1
ROW 3
941Hz
*
0
#
D
NOTE: Column 3 is for special applications and is not normally used
in telephone dialing.
IN1633
When tied high, this pin inhibits detection of tone pairs con-
taining the 1633Hz component. For detection of all 16 stan-
dard digits, IN1633 must be tied low.
N/C Pin
This pin has no internal connection and should be left floating.
Digital Inputs and Outputs
All digital inputs and outputs of the DTMF receivers are rep-
resented by the schematic below. Only the “analog in” pin is
different, and is described above. Care must be exercised
not to exceed the voltage or current ratings on these pins as
listed in the “maximum ratings” section.
VDD
DIGITAL
INPUT
CMOS
DIGITAL
CIRCUITRY
DIGITAL
OUTPUT
VSS
FIGURE 3. DIGITAL INPUTS AND OUTPUTS
ED
This pin, on the CD22203 only, indicates the presence of fre-
quencies which are likely to be DTMF digits, but have not yet
been verified by a DV signal. It is comparable to a “button-
down” output, and it is useful as an EARLY DETECT signal to
interrupt a microprocessor for digit storage and validation.
DV and CLRDV
DV signals a detection by going high after a valid tone pair is
sensed and decoded at the output pins D1, D2, D4, and D8.
Input Filter
The CD22202 and CD22203 will tolerate total input noise of
a maximum of 12dB below the lowest amplitude tone. For
most telephone applications, the combination of the high
frequency attenuation of the telephone line and internal
band limiting make special circuitry at the input to these
receivers unnecessary. However, noise near the 56kHz
internal sampling frequency will be aliased (folded back)
into the audio spectrum, so if excessive noise is present
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