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CD22202 Datasheet, PDF (1/6 Pages) Intersil Corporation – 5V Low Power DTMF Receiver | |||
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DTMF Receivers/Generators
CD22202, CD22203
January 1997
5V Low Power DTMF Receiver
Features
Description
⢠Central Ofï¬ce Quality
⢠No Front End Band Splitting Filters Required
⢠Single, Low Tolerance, 5V Supply
⢠Detects Either 12 or 16 Standard DTMF Digits
⢠Uses Inexpensive 3.579545MHz Crystal for Reference
⢠Excellent Speech Immunity
⢠Output in Either 4-Bit Hexadecimal Code or Binary
Coded 2-of-8
⢠Synchronous or Handshake Interface
⢠Three-State Outputs
⢠Excellent Latch-Up Immunity
Ordering Information
PART
NUMBER
CD22202E
CD22203E
TEMP.
RANGE (oC) PACKAGE
0 to 70 18 Ld PDIP
0 to 70 18 Ld PDIP
PKG. NO.
E18.3
E18.3
The CD22202 and CD22203 complete dual-tone multiple
frequency (DTMF) receivers detect a selectable group of 12
or 16 standard digits. No front-end pre-ï¬ltering is needed.
The only externally required components are an inexpensive
3.579545MHz TV âcolorburstââ crystal (for frequency refer-
ence) and a bias resistor. Extremely high system density is
possible through the use of the clock output of a crystal con-
nected CD22202/CD22203 receiver to drive the time bases
of additional receivers. This is a monolithic integrated circuit
fabricated with low-power, complementary symmetry CMOS
processing. It only requires a single low tolerance power
supply.
The CD22202 and CD22203 employ state-of-the-art circuit
technology to combine the digital and analog functions on
the same CMOS chip using a standard digital semiconductor
process. The analog input is preprocessed by 60Hz reject
and band splitting ï¬lters and then hard limited to provide
AGC. Eight Bandpass ï¬lters detect the individual tones. The
digital post processor times the tone durations and provides
the correctly coded digital outputs. Outputs interface directly
to standard CMOS circuitry and are three-state enabled to
facilitate bus oriented architectures.
Pinout
CD22202, CD22203
(PDIP)
TOP VIEW
D1 1
HEX/B28 2
EN 3
IN1633 4
VDD 5
ED (203 ONLY), 6
NC (202)
VSS 7
XEN 8
ANALOG IN 9
18 D2
17 D4
16 D8
15 CLRDV
14 DV
13 ATB
12 XIN
11 XOUT
10 VSS
Functional Diagram
9
ANALOG IN
13
ATB
8
XEN
XIN
12
11
XOUT
LOW B/P
FILTERS
HIGH B/P
FILTERS
CHIP
CLOCKS
VOLTAGE
REG./REF.
5
VDD
10 7
VSS
6 ED-203
NC-202
15
CLRDV
14
DV
2
HEX/B28
1
D1
18
D2
17
D4
16
D8
3
EN
4
INI633
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
4-245
File Number 1695.3
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