HSP50214 Datasheet, PDF (37/54 Pages) Intersil Corporation – Programmable Downconverter

HSP50214
TABLE 22. DEFINITION OF ADDRESS MAP
READ STATUS
CODE C2-0 TYPE
READ ADDRESS A(2:0)
0
Buffer
000- I LSB
RAM I and 001- I MSB
Q
010- Q LSB
011- Q MSB
See Output Section.
1
Buffer
000- MAG LSB (7-0)
RAM
001- MAG MSB (15-8)
Output
010- PHASE LSB (7-0)
(|r| and φ) 011- PHASE MSB (15-8)
See Output Section.
2
Buffered 000- FREQ LSB
Frequency 001- FREQ MSB
See Output Section.
Applications
Composite Filter Response Example
For this example consider a total receive band roughly
25MHz wide containing 124 200kHz wide FDM channels as
shown in Figure 44. The design goal for the PDC is to tune to
and filter out a single 200kHz FDM channel from the FDM
band, passing only baseband samples onto the baseband
processor at a multiple of the 270.8 KBPS bit rate.
124 CHANNELS
•••
FREQUENCY
3
Not Used
4
Input Level Input AGC
Detector 000- input AGC LSB (0-7)
001- input AGC NLSB (8-15)
010- input AGC MSB (16-23)
200kHz
CHANNEL
5
AGC Data AGC (must write to location 10 to sample)
and Timing 000- AGC LSB (lower 8 bits of linear
Error
control word 3 used by multiplier)
mmmmmmmm LSB
001- AGC MSB (4 shift control bits and
first three bits of linear) control word
oeeeemmm MSB. This yields 11 bits of
the linear control mantissa.
010- Timing error LSB, Not stabilized.
011- Timing error MSB, Not stabilized.
6
Not Used
7
Not Used
Don’t Care Status
111- Status (6:0) consisting of
(6:4)-FIFO depth when output is in FIFO
Buffer RAM Output Mode
(3)-EMPTY signalling the FIFO is empty
and the read pointer cannot be ad-
vanced (Active High)
(2)-FULL signalling the FIFO is full and
new samples will not be written (Active
High)
(1)-READYB Output buffer has reached
the programmed threshold in FIFO
mode or the programmed number of
samples have been taken in snapshot
mode. (Active Low)
(0)-INTEGRATION has been completed
in the input level detector and is ready to
be read. (Active High)
FREQUENCY
FIGURE 44. RECEIVE SIGNAL FREQUENCY SPECTRUM
RF/IF Considerations
The input frequency to the PDC is dependent on the A/D
converter selected, the RF/IF frequency, the bandwidth of
interest and the sample rate of the converter. If the A/D con-
verter has sufficient bandwidth, then undersampling tech-
niques can be used to downconvert IF/RF frequencies as
part of the digitizing process, using the PDC to process a
lower frequency alias of the input signal.
For example, a 70MHz IF can be sampled at 40MHz and the
resulting 10MHz signal alias can be processed by the PDC
to perform the desired downconversion/tuning and filtering. If
the IF signal is less than 1/2 the sample frequency then stan-
dard oversampling techniques can be used to process the
signal. Of the two techniques, only undersampling allows
part of the down conversion function to be brought into the
digital domain just through sampling, assuming that a sam-
pling frequency can be found that keeps the alias signals low
and that the A/D converter has the bandwidth to accept the
unconverted analog signal.
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