HFA3824A Datasheet, PDF (30/40 Pages) Intersil Corporation – Direct Sequence Spread Spectrum Baseband Processor

Bit 2
Bit 1
Bit 0
Bits 0 - 7
Bits 0 - 7
Bits 0 - 7
Bits 0 - 7
Bits 0 - 7
Bits 0 - 7
HFA3824A
CONFIGURATION REGISTER 9 ADDRESS (24h) I/O DEFINITION REGISTER (Continued)
This control bit selects the active level of the transmit ready (TX_RDY) output pin 5.
Logic 1 = TX_RDY active 0.
Logic 0 = TX_RDY active 1.
Reserved (must be set to “0”).
This control bit selects the phase of the transmit output clock (TXCLK) pin 4.
Logic 1 = Inverted TXCLK.
Logic 0 = NON-Inverted TXCLK
CONFIGURATION REGISTER 10 ADDRESS (28h) RSSI VALUE REGISTER
This is a read only register reporting the value of the RSSI analog input signal from the on chip 6-bit ADC. This register is
updated at (chip rate/11). Bits 7 and 6 are not used and set to Logic 0.
Example:
BITS (0:7)
RANGE
RSSI_STAT
76543210
00000000
00h (Min)
00111111
3Fh (Max)
CONFIGURATION REGISTER 11 ADDRESS (2ch) A/D CAL POS REGISTER
This 8-bit control register contains a binary value used for positive increment for the level adjusting circuit of the A/D refer-
ence. The larger the step the faster the level reaches saturation.
CONFIGURATION REGISTER 12 ADDRESS (30h) A/D CAL NEG REGISTER
This 8-bit control register contains a binary value used for the negative increment for the level adjusting reference of the A/D.
The number is programmed as 256 - the value wanted since it is a negative number.
CONFIGURATION REGISTER 13 ADDRESS (34h) TX SPREAD SEQUENCE (HIGH)
This 8-bit register is programmed with the upper byte of the transmit spreading code. This code is used for both the I and Q
signalling paths of the transmitter. This register combined with the lower byte TX_SPREAD(LOW) generates a transmit
spreading code programmable up to 16 bits. Code lengths permitted are 11, 13, 15, and 16. Right justified MSB first.
LENGTH
11
13
15
16
SOME SUITABLE CODES
CR13
CR14
TYPE
05
B8
Barker
1F
35
Barker
1F
35
Modified Barker
1F
35
Modified Barker
CONFIGURATION REGISTER 14 ADDRESS (38h) TX SPREAD SEQUENCE (LOW)
This 8-bit register is programmed with the lower byte of the transmit spreading code. This code is used for the I and Q sig-
nalling paths of the transmitter. This register combined with the higher byte TX_SPREAD(HIGH) generates the transmit
spreading code programmable up to 16 bits.
The example below illustrates the bit positioning for one of the 11-bit Barker PN codes. Example:
Transmit Spreading Code 11-Bit Barker Word Right Justified MSB First.
MSB
LSB
TX_SPREAD(HIGH)
15 14 13 12 11 10 9 8
TX_SPREAD(LOW)
76543210
11-bit Barker code
X X X X X 1 01 10111000
CONFIGURATION REGISTER 15 ADDRESS (3Ch) SCRAMBLER SEED
This register contains the 7-bit (seed) value for the transmit scrambler which is used to preset the transmit scrambler to a
known starting state. The MSB bit position (7) is unused and must be programmed to a Logic 0.
2-128