X9401 Datasheet, PDF (3/20 Pages) Intersil Corporation – Low Noise/Low Power/SPI Bus

X9401
PIN DESCRIPTIONS
Host Interface Pins
Serial Output (SO)
SO is a push/pull serial data output pin. During a read
cycle, data is shifted out on this pin. Data is clocked
out by the falling edge of the serial clock.
Serial Input
SI is the serial data input pin. All opcodes, byte
addresses and data to be written to the pots and pot
registers are input on this pin. Data is latched by the
rising edge of the serial clock.
Serial Clock (SCK)
The SCK input is used to clock data into and out of the
X9401.
Chip Select (CS)
When CS is HIGH, the X9401 is deselected and the
SO pin is at high impedance, and (unless an internal
write cycle is underway) the device will be in the
standby state. CS LOW enables the X9401, placing it
in the active power mode. It should be noted that after
a power-up, a HIGH to LOW transition on CS is
required prior to the start of any operation.
PIN CONFIGURATION
SOIC
V_CC
V_L0/R_L0
V_H0/R_H0
V_W0/R_W0
CS
WP
SI
A₁
V_L1/R_L1
V_H1/R_H1
V_W1/R_W1
V _SS
1
24
2
23
3
22
4
21
5
20
6
19
X9401
7
18
8
17
9
16
10
15
11
14
12
13
NC
V_L3/R_L3
V_H3/R_H3
V_W3/R_W3
A₀
SO
HOLD
SCK
V_L2/R_L2
V_H2/R_H2
V_W2/R_W2
NC
Hold (HOLD)
HOLD is used in conjunction with the CS pin to select the
device. Once the part is selected and a serial sequence
is underway, HOLD may be used to pause the serial
communication with the controller without resetting the
serial sequence. To pause, HOLD must be brought LOW
while SCK is LOW. To resume communication, HOLD is
brought HIGH, again while SCK is LOW. If the pause
feature is not used, HOLD should be held HIGH at all
times.
Device Address (A₀ - A₁)
The address inputs are used to set the least significant 2
bits of the 8-bit slave address. A match in the slave address
serial data stream must be made with the address
input in order to initiate communication with the
X9401. A maximum of 4 devices may occupy the SPI
serial bus.
Potentiometer Pins
V_H (V_H0 - V_H3), V_L (V_L0 - V_L3), R_H (R_H0 - R_H3),
R_L (R_L0 - R_L3)
The V_H/R_H and V_L/R_L inputs are equivalent to the
terminal connections on either end of a mechanical poten-
tiometer.
V_W (V_W0 - V_W3), R_W (R_W0 - R_W3)
The wiper outputs are equivalent to the wiper output of
a mechanical potentiometer.
Hardware Write Protect Input (WP)
The WP pin when LOW prevents nonvolatile writes to
the Wiper Counter Registers.
SI
A₁
V_L1/R_L1
V_H1/R_H1
V_W1/R_W1
V_SS
NC
V_W2/R_W2
V_H2/R_H2
V_L2/R_L2
SCK
HOLD
TSSOP
1
24
2
23
3
22
4
21
5
20
6
19
X9401
7
18
8
17
9
16
10
15
11
14
12
13
WP
CS
V_W0/R_W0
V_H0/R_H0
V_L0/R_L0
V_CC
NC
V_L3/R_L3
V_H3/R_H3
V_W3/R_W3
A₀
SO
3
FN8190.2
September 23, 2005