X5168 Datasheet, PDF (3/19 Pages) Intersil Corporation – CPU Supervisor with 16Kbit SPI EEPROM

Pin Configuration
8 LD SOIC/PDIP
CS
1 ^X5168/69 8
SO
2
7
WP
3
6
V_SS
4
5
X5168, X5169
V_CC
RESET/RESET
SCK
SI
CS
SO
NC
NC
NC
WP
V_SS
14 LD TSSOP
X5168/69
1
14
2
13
3
12
4
11
5
10
6
9
7
8
V_CC
RESET/RESET
NC
NC
NC
SCK
SI
Pin Description
PIN
(SOIC/PDIP)
1
PIN TSSOP
1
2
2
5
8
6
9
3
6
4
7
8
14
7
13
3-5,10-12
NAME
CS
SO
SI
SCK
WP
V_SS
V_CC
RESET/
RESET
NC
FUNCTION
Chip Select Input. CS HIGH, deselects the device and the SO output
pin is at a high impedance state. Unless a nonvolatile write cycle is underway, the device will be
in the standby power mode. CS LOW enables the device, placing it in the active power mode. Prior
to the start of any operation after power-up, a HIGH to LOW transition on CS is required.
Serial Output. SO is a push/pull serial data output pin. A read cycle shifts data out on this pin. The
falling edge of the serial clock (SCK) clocks the data out.
Serial Input. SI is a serial data input pin. Input all opcodes, byte addresses, and memory data on this
pin. The rising edge of the serial clock (SCK) latches the input data. Send all opcodes (Table 1),
addresses and data MSB first.
Serial Clock. The serial clock controls the serial bus timing for data input and output. The rising edge
of SCK latches in the opcode, address, or data bits present on the SI pin. The falling edge of SCK
changes the data output on the SO pin.
Write Protect. The WP pin works in conjunction with a nonvolatile WPEN bit to “lock” the setting
of the watchdog timer control and the memory write protect bits.
Ground
Supply Voltage
Reset Output. RESET/RESET is an active LOW/HIGH, open drain output which goes active
whenever V_CC falls below the minimum V_CC sense level. It will remain active until V_CC rises above
the minimum V_CC sense level for 200ms. RESET/RESET goes active if the watchdog timer is
enabled and CS remains either HIGH or LOW longer than the selectable watchdog time out
period. A falling edge of CS will reset the watchdog timer. RESET/RESET goes active on power-
up at about 1V and remains active for 200ms after the power supply stabilizes.
No internal connections
3
FN8130.1
September 16, 2005