ISL6627 Datasheet, PDF (3/11 Pages) Intersil Corporation – VR11.1, VR12 Compatible Synchronous Rectified Buck MOSFET Driver

Pin Configuration
ISL6627
ISL6627
(10 LD 3x3 DFN)
TOP VIEW
UGATE ₁
BOOT 2
TD 3
PWM 4
GND 5
PAD
(GND)
10 ^PHASE
9 EN
8 NC
7 VCC
6 LGATE
Functional Pin Descriptions
PIN #
1
2
3
4
5
6
7
8
9
-
SYMBOL
UGATE
BOOT
TD
PWM
GND
LGATE
VCC
NC
EN
PAD
DESCRIPTION
Upper gate drive output. Connect to gate of high-side power N-Channel MOSFET.
Floating bootstrap supply pin for the upper gate drive. Connect the bootstrap capacitor between this pin and the
PHASE pin. The bootstrap capacitor provides the charge to turn on the upper MOSFET. See “Internal Bootstrap
Device” on page 7 for guidance in choosing the capacitor value.
Deadtime programming pin. Connect to ground or VCC via resistor to program fixed time delay from LGATE fall to
UGATE rise or UGATE fall to LGATE rise. Open pin sets the adaptive mode. See Table 1 for more details.
Control input for the driver. The PWM signal can enter three distinct states during operation; see “Advanced PWM
Protocol (Patent Pending)” on page 6 for further details. Connect this pin to the PWM output of the controller.
Bias and reference ground. All signals are referenced to this node. It is also the power ground return of the
driver.
Lower gate drive output. Connect to gate of the low-side power N-Channel MOSFET.
Connect to 5V bias supply. This pin supplies power to the gate drives and small-signal circuitry. Place a high
quality low ESR ceramic capacitor from this pin to GND.
No connection.
Enable input pin. Connect this pin high to enable the driver and low to disable the driver.
EPAD at ground potential. Soldering it directly to GND plane is required for thermal considerations.
Ordering Information
PART NUMBER
(Notes 1, 2, 3)
PART
MARKING
TEMP. RANGE
(°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
ISL6627CRZ
6627
0 to +70
10 Ld 3x3 DFN
L10.3X3
ISL6627IRZ
627I
-40 to +85
10 Ld 3x3 DFN
L10.3X3
NOTES:
1. Add “-T*” suffix for tape and reel. Please refer to TB347 for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for ISL6627. For more information on MSL please see techbrief TB363.
3
FN6992.0
September 22, 2011