ISL6444 Datasheet, PDF (3/18 Pages) Intersil Corporation – Dual PWM Controller with DDR Memory Option for Gateway Applications

ISL6444
Absolute Maximum Ratings
Bias Voltage, V_cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .+ 6.5V
Input Voltage, V_in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +27.0V
PHASE, BOOT, ISEN, UGATE . . . . . . . . . . . . . GND-0.3V to +33.0V
BOOT with respect to PHASE . . . . . . . . . . . . . . . . . . . . . . . . . .+ 6.5V
All Other Pins . . . . . . . . . . . . . . . . . . . . . . . GND -0.3V to V_cc + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 2
Recommended Operating Conditions
Bias Voltage, V_cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +5.0V ±5%
Input Voltage, V_in . . . .
Ambient Temperature
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+5.0V to +24.0V
. -10^oC to 85^oC
Junction Temperature Range . . . . . . . . . . . . . . . . . -10^oC to 125^oC
Thermal Information
Thermal Resistance (Typical, Note 1)
θ_JA (^oC/W)
SSOP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . .
78
Maximum Junction Temperature (Plastic Package) . . . . . . . .150^oC
Maximum Storage Temperature Range . . . . . . . . . -65^oC to 150^oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300^oC
(SSOP - Lead Tips Only)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ_JA is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications Recommended Operating Conditions, Unless Otherwise Noted.
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
VCC SUPPLY
Bias Current
I_CC
LGATEx, UGATEx Open, VSENx forced above -
regulation point, DDR=0, VIN>5V
Shut-down Current
I_CCSN
-
VCC UVLO
Rising Vcc Threshold
V_CCU
4.3
Falling Vcc Threshold
V_CCD
4.1
VIN
Input Voltage Pin Current (Sink)
I_VIN
10
Input Voltage Pin Current (Source)
I_VINO
-
Shut-down Current
I_VINS
-
OSCILLATOR
PWM1 Oscillator Frequency
F_c
255
Ramp Amplitude, pk-pk
V_R1
Vin= 16V, by design
-
Ramp Amplitude, pk-pk
V_R2
Vin= 5V, by design
-
Ramp Offset
V_ROFF By design
-
Ramp/V_IN Gain
G_RB1 Vin≥ 3V, by design
-
Ramp/V_IN Gain
G_RB2 1 ≤ Vin ≤ 3V, by design
-
REFERENCE AND SOFT START
Internal Reference Voltage
V_REF
-
Reference Voltage Accuracy
-1.0
Soft-Start Current During Start-up
I_SOFT
-
Soft-Start Complete Threshold
V_ST
By design
PWM CONVERTERS
Load Regulation
VSEN pin bias current
VOUT pin input impedance
I_VSEN
I_VOUT
0.0mA < I_VOUT1 < 5.0A; 5.0V < V_BATT < 24.0V -2.0
By design
50
VOUT = 5V
40
TYP
2.2
-
4.65
4.35
-
-15
-
300
2
1.25
0.5
125
250
0.9
-
-5
1.5
-
80
55
MAX
3.2
30
4.75
4.45
30
-30
1
345
-
-
-
-
-
-
+1.0
-
+2.0
120
65
UNITS
mA
µA
V
V
µA
µA
µA
kHz
V
V
V
mV/V
mV/V
V
%
µA
V
%
nA
kOhm
3