ISL6223 Datasheet, PDF (3/15 Pages) Intersil Corporation – Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller

ISL6223
Simplified Power System Diagram
VSEN
ISL6223
PWM 1
SYNCHRONOUS
RECTIFIED BUCK
CHANNEL
PWM 2 ^SYNCHRONOUS
RECTIFIED BUCK
VID
CHANNEL
MICROPROCESSOR
Functional Pin Descriptions
VID4 ¹
VID3 2
VID2 3
VID1 4
VID0 5
COMP 6
FB 7
FS/DIS 8
GND 9
VSEN 10
20 V_CC
19 _PGOOD
18 _NC
17 _NC
16 _ISEN1
15 _PWM1
14 _PWM2
13 _ISEN2
12 NC
11 DACOUT
DACOUT (Pin 11)
The DAC output. Connect a capacitor to this pin slows down
the transition of the DAC output that is also the reference
voltage to the error amplifier.
NC (Pin 12, Pin 17, Pin 18)
No connection.
ISEN2 (Pin 13) and ISEN1 (Pin 16)
Current sense inputs from the individual converter channel’s
phase nodes.
PWM2 (Pin 14) and PWM1 (Pin 15)
PWM outputs for each driven channel in use. Connect these
pins to the PWM input of a HIP6601/2/3 driver.
PGOOD (Pin 19)
Power good. This pin provides an open-drain logic-high
signal when the microprocessor CORE voltage (VSEN pin)
is within specified limits and Soft-Start has timed out.
V_CC (Pin 20)
Bias supply. Connect this pin to a 5V supply.
VID4 (Pin 1), VID3 (Pin 2), VID2 (Pin 3), VID1 (Pin 4)
and VID0 (Pin 5)
Voltage Identification inputs from microprocessor. These pins
respond to TTL and 3.3V logic signals. The ISL6223 decodes
VID bits to establish the output voltage. See Table 1.
COMP (Pin 6)
Output of the internal error amplifier. Connect this pin to the
external feedback and compensation network.
FB (Pin 7)
Inverting input of the internal error amplifier.
FS/DIS (Pin 8)
Channel frequency, F_SW, select and disable. A resistor from
this pin to ground sets the switching frequency of the
converter. Pulling this pin to ground disables the converter
and three states the PWM outputs. See Figure 11.
GND (Pin 9)
Bias and reference ground. All signals are referenced to this
pin.
VSEN (Pin 10)
Power good monitor input. Connect to the microprocessor-
CORE voltage.
3