ISL6223 Datasheet, PDF (10/15 Pages) Intersil Corporation – Mobile Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller

ISL6223
R_IN
R_FB C_c
FB
COMP
ERROR
AMPLIFIER
-
+
SAWTOOTH
GENERATOR
CORRECTION
+
-
ISL6223
COMPARATOR
-
PWM
+
CIRCUIT
REFERENCE
DAC
DIFFERENCE
+
-
TO OTHER
CHANNEL
TO OVER
CURRENT
+
TRIP
-
COMPARATOR
AVERAGING
REFERENCE
CURRENT
SENSING
CURRENT
SENSING
FROM
OTHER
CHANNEL
PWM
I_SEN
V_IN
Q1 L01
HIP6601
Q2
I_L
PHASE
R_ISEN
ONLY ONE OUTPUT
STAGE SHOWN
INDUCTOR
CURRENT
FROM
OTHER
CHANNEL
V_CORE
FIGURE 8. SIMPLIFIED FUNCTIONAL BLOCK DIAGRAM SHOWING CURRENT AND VOLTAGE SAMPLING
CORE Voltage Programming
The voltage identification pins (VID0, VID1, VID2, VID3 and
VID4) set the CORE output voltage. Each VID pin is pulled to
V_CC by an internal 12µA current source and accepts open-
collector/open-drain/open-switch-to-ground or standard low-
voltage TTL or CMOS signals.
Table 1 shows the nominal DAC voltage as a function of the
VID codes. The power supply system is ±1% accurate over
the operating temperature and voltage range.
Current Sensing and Balancing
Overview
The ISL6223 samples the on-state voltage drop across each
synchronous rectifier FET, Q2, as an indication of the
inductor current in that phase, see Figure 8. Neglecting AC
effects (to be discussed later), the voltage drop across Q2 is
simply r_DS(ON)(Q2) x inductor current (I_L). Note that I_L, the
inductor current, is 1/2 of the total current (I_LT).
The voltage at Q2’s drain, the PHASE node, is applied to the
R_ISEN resistor to develop the I_ISEN current to the ISL6223
ISEN pin. This pin is held at virtual ground, so the current
through R_ISEN is I_L x r_DS(ON)(Q2) / R_ISEN.
The I_ISEN current provides information to perform the
following functions:
1. Detection of an overcurrent condition
10
2. Reduce the regulator output voltage with increasing load
current (droop)
3. Balance the I_L currents in the two phases
Overcurrent, Selecting R_ISEN
The current detected through the R_ISEN resistor is averaged
with the current detected in the other channel. The averaged
current is compared with a trimmed, internally generated
current, and used to detect an overcurrent condition.
The nominal current through the R_ISEN resistor should be
50µA at full output load current, and the nominal trip point for
overcurrent detection is 150% of that value, or 75µA.
Therefore, R_ISEN = I_L x r_DS(ON) (Q2) / 50µA.
For a full load of 25A per phase, and an r_DS(ON) (Q2) of
4mΩ, R_ISEN = 2kΩ.
The overcurrent trip point would be 150% of 25A, or
approximately 37.5A per phase. The R_ISEN value can be
adjusted to change the overcurrent trip point, but it is
suggested to stay within ±25% of nominal.
Droop, Selection of R_IN
The average of the currents detected through the R_ISEN
resistors is also steered to the FB pin. There is no DC return
path connected to the FB pin except for R_IN, so the average
current creates a voltage drop across R_IN. This drop increases
the apparent V_CORE voltage with increasing load current,
causing the system to decrease V_CORE to maintain balance at
the FB pin. This is the desired “droop” voltage used to maintain
V_CORE within limits under transient conditions.