English
Language : 

D2-7XX83 Datasheet, PDF (28/32 Pages) Intersil Corporation – Powered Speaker Systems
D2-7xx83
READING AND WRITING CONTROL REGISTERS
Registers and memory spaces are defined within the DAE-6
firmware for specific internal operation and control. In typical
reference designs, the highest-order byte of the register address
(bits 23:16) determines the internal address space used for
control read or write access, and the remaining 16 bits (bits
15:0) describe the actual address within that space. Refer to the
descriptions of the actual reference design firmware being used
in the application for specific definitions.
All reads or writes to registers (shown in Figures 10 and 11)
begin with a Start Condition, followed by the Device Address byte,
three Register Address bytes, three Data bytes and a Stop
Condition.
Register writes through the I2C interface are initiated by setting
the read/write bit that is within the device address byte. The
device write function as, shown in Figure 10, executes the
following 9 steps as the I2C bus master:
1. I2C START command
2. Transmit device I2C address with W
3. Transmit mode byte
4. Transmit upper memory address byte
5. Transmit lower memory address byte
6. Transmit data upper byte
7. Transmit data middle byte
8. Transmit data lower byte
9. I2C STOP command
All reads to registers require two steps. First, the master must
send a dummy write, which consists of sending a Start, followed
by the device address with the write bit set, and three register
address bytes. Next, the master must send a repeated Start,
following with the device address with the read/write bit set to
read, and then read the next three data bytes. The master must
Acknowledge (ACK) the first two read bytes and send a Not
Acknowledge (NACK) on the third byte received and a Stop
condition to complete the transaction. The device's control
interface acknowledges each byte by pulling SDA low on the bit
immediately following each write byte. The device read function,
as shown in Figure 11, executes the following 11 steps as the I2C
bus master:
1. I2C START command
2. Transmit device I2C address with W
3. Transmit mode byte
4. Transmit upper memory address byte
5. Transmit lower memory address byte
6. Repeat START command
7. Transmit device I2C address with R
8. Receive data upper byte
9. Receive data middle byte
10. Receive data lower byte
11. I2C STOP command or NACK
DEVICE-ADDR
ACK
REGISTER [23:16]
ACK
REGISTER [15:8]
ACK
REGISTER [7:0]
START
Write Sequence
R/W
REGISTER [7:0]
ACK
DATA [23:16]
ACK
DATA [15:8]
ACK
DATA [7:0]
ACK
DEVICE-ADDR
FIGURE 10. I2C WRITE SEQUENCE OPERATION
ACK
REGISTER [23:16]
Step 1
ACK
REGISTER [15:8]
ACK
REGISTER [7:0]
ACK
START
Read Sequence
ACK
R/W
DEVICE-ADDR
ACK
DATA [23:16]
MASTER
ACK
DATA [15:8]
MASTER
ACK
REPEAT
START
DATA [7:0]
REPEAT
START
R/W
Step 2
FIGURE 11. I2C READ SEQUENCE OPERATION
STOP
NACK
STOP
Submit Document Feedback 28
FN7838.3
April 28, 2016