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ISL6262CRZ-T Datasheet, PDF (25/27 Pages) Intersil Corporation – Two-Phase Core Regulator for IMVP-6 Mobile CPUs
ISL6262
In the above example, the two errors add to 4A. For the two
phase DC/DC, the currents would be 22A in one phase and
18A in the other phase. In the above analysis, the current
balance can be calculated with 2A/20A = 10%. This is the
worst case calculation, for example, the actual tolerance of
two 10% DCRs is 10%*sqrt(2) = 7%.
There are provisions to correct the current imbalance due to
layout or to purposely divert current to certain phase for
better thermal management. Customer can put a resistor in
parallel with the current sensing capacitor on the phase of
interest in order to purposely increase the current in that
phase.
In the case the pc board trace resistance from the inductor to
the microprocessor are not the same on two phases, the
current will not be balanced. On the phase that have too
much trace resistance a resistor can be added in parallel
with the ISEN capacitor that will correct for the poor layout.
An estimate of the value of the resistor is:
Rtweak = Risen * Rdcr/(Rtrace-Rmin)
where Risen is the resistance from the phase node to the
ISEN pin; usually 10kΩ. Rdcr is the DCR resistance of the
inductor. Rtrace is the trace resistance from the inductor to
the microprocessor on the phase that needs to be tweaked.
It should be measured with a good microOhm meter. Rmin is
the trace resistance from the inductor to the microprocessor
on the phase with the least resistance.
For example, if the pc board trace on one phase is 0.5mΩ
and on another trace is 0.3mΩ; and if the DCR is 1.2mΩ;
then the tweaking resistor is
Rtweak = 10kΩ * 1.2/(0.5 - 0.3) = 60kΩ.
When choosing current sense resistor, not only the tolerance
of the resistance is important, but also the TCR. And its
combined tolerance at a wide temperature range should be
calculated.
Droop Using Discrete Resistor Sensing - Static/
Dynamic Mode of Operation
Figure 36 shows the equivalent circuit of a discrete current
sense approach. Figure 27 shows a more detailed
schematic of this approach. Droop is solved the same way
as the DCR sensing approach with a few slight
modifications.
First, there is no NTC required for thermal compensation,
therefore, the Rn resistor network in the previous section is
not required. Secondly, there is no time constant matching
required, therefore, the Cn component is not matched to the
L/DCR time constant. This component does indeed provide
noise immunity and therefore is populated with a 39pF
capacitor.
The RS values in the previous section, RS = 1.5k_1% are
sufficient for this approach.
Now, the input to the droop amplifier is essentially the
Vrsense voltage. This voltage is given by the following
equation:
VrsenseEQV
=
R-----s---e---n----s---e-
2
•
IOUT
(EQ. 26)
The gain of the droop amplifier, Kdroopamp, must be adjusted
for the ratio of the Rsense to droop impedance, Rdroop. We
use the following equation:
Kdroopamp
=
-R----d----r--o---o---p--
Rsense
•
IOUT
(EQ. 27)
Solving for the Rdrp2 value, Rdroop = 0.0021(V/A) as per
the Intel IMVP-6 specification, Rsense = 0.001Ω and
Rdrp1 = 1kΩ, we obtain the following:
Rdrp2 = (Kdroopamp – 1) • Rdrp1= 3.2kΩ
(EQ. 28)
These values are extremely sensitive to layout. Once the
board has been laid out, some tweaking may be required to
adjust the full load droop. This is fairly easy and can be
accomplished by allowing the system to achieve thermal
equilibrium at full load, and then adjusting Rdrp2 to obtain
the desired droop value.
Fault Protection - Overcurrent Fault Setting
As previously described, the overcurrent protection of the
ISL6262 is related to the droop voltage. Previously we have
calculated that the droop voltage = ILoad * Rdroop, where
Rdroop is the load line slope specified as 0.0021 (V/A) in the
Intel IMVP-6 specification. Knowing this relationship, the
overcurrent protection threshold can be set up as a voltage
droop level. Knowing this voltage droop level, one can
program in the appropriate drop across the Roc resistor.
This voltage drop will be referred to as Voc. Once the droop
voltage is greater than Voc, the PWM drives will turn off and
PGOOD will go low.
The selection of Roc is given in equation. Assuming we
desire an overcurrent trip level, Ioc, of 55A, and knowing
from the Intel Specification that the load line slope, Rdroop is
0.0021 (V/A), we can then calculate for Roc as shown in
equation.
ROC
=
-I-O-----C-----•----R-----d---r---o---o---p-
10 μ A
=
5----5-----•----0---.--0---0----2---1--
10 • 10–6
=
11.5 k Ω
(EQ. 29)
Note, if the droop load line slope is not -0.0021 (V/A) in the
application, the overcurrent setpoint will differ from
predicted.
25
FN9199.2
May 15, 2006