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ISL6256 Datasheet, PDF (22/26 Pages) Intersil Corporation – Highly Integrated Battery Charger with Automatic Power Source Selector for Notebook Computers
ISL6256, ISL6256A
A filter should be added between RS1 and CSIP and CSIN to
reduce switching noise. The filter roll off frequency should be
between the crossover frequency and the switching
frequency (~100kHz).
Voltage Control Loop
When the battery is charged to the voltage set by CELLS and
VADJ the voltage error amplifier (gm1) takes control of the
output (assuming that the adapter current is below the limit set
by ACLIM). The voltage error amplifier (gm1) discharges the
cap on VCOMP to limit the output voltage. The current to the
battery decreases as the cells charge to the fixed voltage and
the voltage across the internal battery resistance decreases.
As battery current decreases the 2 current error amplifiers
(gm2 and gm3) output their maximum current and charge the
capacitor on ICOMP to its maximum voltage (limited to 1.2V
above VCOMP). With high voltage on ICOMP, the minimum
voltage buffer output equals the voltage on VCOMP.
The voltage control loop is shown in Figure 22.
PHASE
L
11
R FET_rDS(ON)
RL_DCR
+
CA2
SΣ
0.25
+
-
20
-
R3
VCOMP
-
gm1
+
R4
C VCOMP
RVCOMP
+
2.1V -
CSOP
CSON
RF2
C F2
RS2
CO
RESR
RBAT
FIGURE 22. VOLTAGE CONTROL LOOP
Output LC Filter Transfer Functions
The gain from the phase node to the system output and
battery depend entirely on external components. Typical
output LC filter response is shown in Figure 23. Transfer
function ALC(s) is shown in Equation 38:
ALC
=
---------------⎝⎛---1----–------ω--------E-----s---S--------R------⎠⎞---------------
⎛
⎜
⎝
ω---s--D--2--P--
+
(---ω----L----C-s----⋅---Q-----)
+
⎞
1⎟
⎠
(EQ. 38)
ωESR
=
---------------1-----------------
(RESR ⋅ Co)
ωLC
=
-----------1------------
( L ⋅ Co)
Q = Ro ⋅
---L---
Co
20
10
0
-10
-20
-30 RBATTERY = 200mΩ
-40
-50
RBATTERY = 50mΩ
-60
NO BATTERY
-20
-40
-60
-80
-100
-120
-140
-160
100 200 500 1k 2k 5k 10k 20k 50k 100k 200k 500k
FREQUENCY
FIGURE 23. FREQUENCY RESPONSE OF THE LC OUTPUT
FILTER
The resistance RO is a combination of MOSFET rDS(ON),
inductor DCR, RSENSE and the internal resistance of the
battery (normally between 50mΩ and 200mΩ). The worst case
for voltage mode control is when the battery is absent. This
results in the highest Q of the LC filter and the lowest phase
margin.
The compensation network consists of the voltage error
amplifier gm1 and the compensation network RVCOMP,
CVCOMP which give the loop very high DC gain, a very low
frequency pole and a zero at fZERO1. Inductor current
information is added to the feedback to create a second zero
fZERO2. The low pass filter RF2, CF2 between RSENSE and
ISL6256 add a pole at fFILTER. R3 and R4 are internal divider
resistors that set the DC output voltage. For a 3-cell battery,
R3 = 320kΩ and R4 = 64kΩ. Equations 39, 40, 41, 42, 43 and
44 relate the compensation network’s poles, zeros and gain to
the components in Figure 22. Figure 2424 shows an
asymptotic bode plot of the DC/DC converter’s gain vs
frequency. It is strongly recommended that fZERO1 is
approximately 30% of fLC and fZERO2 is approximately 70%
of fLC.
22
FN6499.3
September 14, 2010