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X40420_06 Datasheet, PDF (21/25 Pages) Intersil Corporation – Dual Voltage Monitor with Integrated CPU Supervisor and System Battery Switch
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RESET/RESET/MR Timings
X40420, X40421
VTRIP1
VCC
tPURST
RESET
tR
VRVALID
tRPD1
tPURST
tF
RESET
MR
tMD
LOW VOLTAGE AND WATCHDOG TIMINGS PARAMETERS (@25°C, VCC = 5V)
Symbol
tRPD1(1)
tRPDL
tLR(1)
tRPD2(1)
tPURST
tF
tR
VRVALID
t MD
tin1
tWDO
tRST1
tRST2
tRSP
Parameters
VTRIP1 to RESET/RESET (Power-down only)
VTRIP1 to LOWLINE
LOWLINE to RESET/RESET delay (Power-down only) [= tRPD1-tRPDL]
VTRIP2 to V2FAIL
Power-on Reset delay:
PUP1=0, PUP0=0
PUP1=0, PUP0=1 (factory default)
PUP1=1, PUP0=0
PUP1=1, PUP0=1
VCC, V2MON Fall Time
VCC, V2MON Rise Time
Reset Valid VCC
MR to RESET/ RESET delay (activation only)
Pulse width Suppression Time for MR
Watchdog Timer Period:
WD1=0, WD0=0
WD1=0, WD0=1
WD1=1, WD0=0
WD1=1, WD0=1 (factory default)
Watchdog Reset Time Out Delay
WD1=0, WD0=0
WD1=0, WD0=1
Watchdog Reset Time Out Delay WD1=1, WD0=0
Watchdog timer restart pulse width
Min.
20
20
1
500
50
100
12.5
1
Typ.
500
50(1)
200
400(1)
800(1)
1.4(1)
200(1)
25
OFF
200
25
Max.
5
5
300
37.5
Unit
µs
ns
µs
ms
ms
ms
ms
mV/µs
mV/µs
V
ns
ns
s
ms
ms
ms
ms
µs
Note: (1) Based on characterization data.
21
May 25, 2006
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