80C286_1 Datasheet, PDF (20/60 Pages) Intersil Corporation – High Performance Microprocessor with Memory Management and Protection

80C286
Segment Descriptor Cache Registers
A segment descriptor cache register is assigned to each of
the four segment registers (CS, SS, DS, ES). Segment
descriptors are automatically loaded (cached) into a seg-
ment descriptor cache register (Figure 12) whenever the
associated segment register is loaded with a selector.
Only segment descriptors may be loaded into segment
descriptor cache registers. Once loaded, all references to
that segment of memory use the cached descriptor informa-
tion instead of reaccessing the descriptor. The descriptor
cache registers are not visible to programs. No instructions
exist to store their contents. They only change when a seg-
ment register is loaded.
ACCESS
RIGHTS
PROGRAM VISIBLE
SEGMENT SELECTORS
CS
DS
SS
ES
15
0
SEGMENT REGISTERS
(LOADED BY PROGRAM)
PROGRAM INVISIBLE
SEGMENT PHYSICAL
BASE ADDRESS
SEGMENT SIZE
7
07
0
+7
RESERVED †
+6
+5 ^{P DPL 0}
TYPE
XX X
WORD COUNT
4-0
+4
+3
DESTINATION SELECTOR _{15 - 0} ^{X X} +2
+1
DESTINATION OFFSET _{15 - 0}
0
15
87
0
† MUST BE SET TO 0 FOR COMPATIBILITY WITH FUTURE UPGRADES
FIGURE 11. GATE DESCRIPTOR
TABLE 12. GATE DESCRIPTOR FORMAT FIELD
NAME
VALUE
DESCRIPTION
TYPE
4 Call Gate
5 Task Gate
6 Interrupt Gate
7 Trap Gate
P
0 Descriptor Contents are not valid
1 Descriptor Contents are valid
47
40 39
16 15
0
SEGMENT DESCRIPTOR CACHE REGISTERS
(AUTOMATICALLY LOADED BY CPU)
FIGURE 12. DESCRIPTOR CACHE REGISTERS
SELECTOR
INDEX
TI RPL
BITS
15
NAME
87
21 0
FUNCTION
1 - 0 Requested Privilege Level Indicates Selector Privilege
(RPL)
Level Desired
2 Table Indicator (TI)
TI = 0 Use Global Descrip-
tor Table (GDT)
TI = 1 Use Local Descriptor
Table (LDT)
15 - 3 Index
Select Descriptor Entry In
Table
DPL
0 - 3 Descriptor Privilege Level
FIGURE 13. SELECTOR FIELDS
WORD
COUNT
0 - 31
Number of words to copy from callers
stack to called procedures stack. Only
used with call gate.
DESTINATION 16-Bit Selector to the target code segment
SELECTOR Selector (call, interrupt or selector Trap Gate).
Selector to the target task state seg-
ment (Task Gate).
DESTINATION 16-Bit Entry point within the target code seg-
OFFSET
Offset ment
Selector Fields
A protected mode selector has three fields: descriptor entry
index, local or global descriptor table indicator (T_I), and selec-
tor privilege (RPL) as shown in Figure 13. These fields select
one of two memory based tables of descriptors, select the
appropriate table entry and allow high-speed testing of the
selector's privilege attribute (refer to privilege discussion
below).
Local and Global Descriptor Tables
Two tables of descriptors, called descriptor tables, contain all
descriptors accessible by a task at any given time. A descriptor
table is a linear array of up to 8192 descriptors. The upper 13
bits of the selector value are an index into a descriptor table.
Each table has a 24-bit base register to locate the descriptor
table in physical memory and a 16-bit limit register that confine
descriptor access to the defined limits of the table as shown in
Figure 14. A restartable exception (13) will occur if an attempt is
made to reference a descriptor outside the table limits.
One table, called the Global Descriptor table (GDT), contains
descriptors available to all tasks. The other table, called the
Local Descriptor Table (LDT), contains descriptors that can
be private to a task. Each task may have its own private LDT.
The GDT may contain all descriptor types except interrupt
and trap descriptors. The LDT may contain only segment,
task gate, and call gate descriptors. A segment cannot be
accessed by a task if its segment descriptor does not exist in
either descriptor table at the time of access.
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