ISL6186_14 Datasheet, PDF (2/18 Pages) Intersil Corporation – USB Port Power Supply Controller

Simplified Block Diagram
ISL6186
GND
VIN
VIN
EN
-V_COMP
-
+
POR
CURRENT AND TEMP.
MONITORING, GATE,
DELAY AND OUTPUT CONTROL
LOGIC
PGD
PGD only on 10DFN
OUT
OUT
FAULT
Pin Configurations
ISL6186
(8 LD SOIC/DFN)
TOP VIEW
GND ₁
VIN 2
VIN ³
EN/EN ⁴
(GND)
EPAD
DFN ONLY
8 ^OUT
7 OUT
6 _OUT
5 _FLT
ISL6186
(10 LD DFN)
TOP VIEW
GND 1
VIN 2
VIN 3
VIN 4
EN/EN 5
(GND)
EPAD
10 ^PGD
9 OUT
8 OUT
7 OUT
6 FLT
Pin Descriptions
PIN NUMBER
8 Ld
SOIC/DFN 10 Ld DFN
SYMBOL
1
1
GND
2, 3
2, 3, 4
VIN
4
5
EN/EN
DESCRIPTION
IC ground reference
Chip bias, Controlled Voltage Input, Undervoltage Lock Out (UVLO). V_IN provides chip bias voltage. At V_IN
< 1.7V, chip functionality is disabled, FLT is active and floating and OUT is held low. Range 0V to 5.5V
Enable/Disable inputs, Active high (EN) and active low (EN) options enable the power switch. These
inputs have internal 1MΩ pull-off resistors. Range 0V to V_IN
2
FN7698.2
November 3, 2011