ISL24202_14 Datasheet, PDF (2/12 Pages) Intersil Corporation – Programmable VCOM Calibrator with EEPROM

ISL24202
Block Diagram
VDD
AVDD
5
2
3
DNC
6
CTL
7
CE
VDD
RBIAS
RBIAS
DIGITAL
INTERFACE
UP/DOWN
COUNTER
DAC
REGISTERS
8-BIT EEPROM
CS
ANALOG DCP
AND
CURRENT SINK
Q1
A1
1
OUT
8
SET
4
GND
FIGURE 2. BLOCK DIAGRAM OF THE ISL24202
Pin Descriptions
Pin Configuration
PIN NAME PIN #
FUNCTION
OUT
1 Adjustable Sink Current Output Pin. The sink current into
the OUT pin is equal to the DAC setting times the
maximum adjustable sink current divided by 256. See
the “SET” pin function description below (pin 8) for
setting the maximum adjustable sink current.
A_VDD
2 High-Voltage Analog Supply. Bypass to GND with 0.1µF
capacitor.
DNC
3 Do Not Connect to external circuitry. It is acceptable to
ground this pin.
GND 4 Ground connection.
V_DD
5 Digital power supply input. Bypass to GND with 0.1µF
de-coupling capacitor.
CTL
6 Up/Down Control for internal counter and Internal
EEPROM Programming Control Input. When CE is high:
A low-to-mid transition increments the 8-bit counter,
adding 1 to the DAC setting, increasing the OUT sink
current, and lowering the divider voltage at the OUT pin.
A high-to-mid transition decrements the 8-bit counter,
subtracting 1 from the DAC setting, decreasing the OUT
sink current, and increasing the divider voltage at the
OUT pin.
To program the EEPROM, take this pin to >4.9V (see
“CTL EEPROM Programming Signal Time” in the
“Electrical Specifications” table on page 5 for details).
Float when not in use.
CE
7 Counter Enable Pin. Connect CE to V_DD to enable
adjustment of the output sink current. Float or connect
CE to GND to prevent further adjustment or
programming (Note: the CE pin has an internal 500nA
pull-down sink current). The EEPROM value will be
copied to the register on a V_OH to V_OL transition.
SET
8 Maximum Sink Current Adjustment Pin. Connect a
resistor from SET to GND to set the maximum
adjustable sink current of the OUT pin. The maximum
adjustable sink current is equal to (AV_DD/20) divided
by R_SET.
PAD
- Thermal pad should be connected to system ground
plane to optimize thermal performance.
ISL24202
(8 LD TDFN)
TOP VIEW
OUT 1
AVDD 2
DNC 3
GND ₄
PAD
8 ^SET
7 CE
6 CTL
5 ^VDD
(*CONNECT THERMAL PAD TO GND)
2
FN7587.0
March 15, 2011