HCTS160T Datasheet, PDF (2/3 Pages) Intersil Corporation – Radiation Hardened Synchronous Counter

HCTS160T
Functional Diagram
P0
3
P1
4
P2
5
P3
6
SPE
MR
CP
Q3 Q0 Q3 Q0
MR P
D0
T0 Q0
CP Q0
Q2 Q3 Q0 Q1
MR P
D1
T1 Q1
CP
Q1
Q0 Q2 Q0 Q3
MR P
D2
T2 Q2
CP
MR P
D3
T3 Q3
CP Q0
Q3 Q3
PE
TE
GND V_CC
8
16
14 15
Q0 TC
13
Q1
12
Q0
11
Q1
TRUTH TABLE
INPUTS
OPERATING MODE
MR
CP
PE
TE
SPE
Pn
Reset (Clear)
L
X
X
X
X
X
Parallel Load
H
X
X
l
l
H
X
X
l
h
Count
H
h
h
h (Note 3)
X
Inhibit
H
X
l (Note 2)
X
h (Note 3)
X
H
X
X
l (Note 2) h (Note 3)
X
H = HIGH voltage level.
L = LOW voltage level.
h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition.
l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition.
X = Immaterial.
q = Lower case letter indicate the state of the referenced output prior to the LOW-to-HIGH clock transition.
= LOW-to-HIGH clock transition.
OUTPUTS
Qn
TC
L
L
L
L
H
(Note 1)
Count
(Note 1)
qn
(Note 1)
qn
L
NOTES:
1. The TC output is HIGH when TE is HIGH and the counter is at terminal count (HHHH for 161 and HLLH for 160).
2. The HIGH-to-LOW transition of PE or TE on the 54/74161 and 54/74160 should only occur while CP is high for conventional operation.
3. The LOW-to-HIGH transition of SPE on the 54/74161 and 54/74160 should only occur while CP is high for conventional operation.
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