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HCTS160T Datasheet, PDF (1/3 Pages) Intersil Corporation – Radiation Hardened Synchronous Counter | |||
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Data Sheet
HCTS160T
July 1999 File Number 4626.1
Radiation Hardened Synchronous
Counter
Intersilâs Satellite Applications FlowTM (SAF) devices are fully
tested and guaranteed to 100kRAD total dose. These QML
Class T devices are processed to a standard ï¬ow intended
to meet the cost and shorter lead-time needs of large
volume satellite manufacturers, while maintaining a high
level of reliability.
The Intersil HCTS160T is a Radiation Hardened High Speed
Presettable BCD Decade Synchronous Counter that
features an asynchronous reset and look-ahead carry logic.
Counting and parallel presetting are accomplished
synchronously with the low-to-high transition of the clock. A
low level on the synchronous parallel enable input, SPE,
disables counting and allows data at the preset inputs, P0 -
P3, to be loaded into the counter. The counter is reset by a
low on the master reset input, MR. Two count enables, PE
and TE are provided for n-bit cascading. TE also controls the
terminal count output, TC. The terminal count output
indicates a maximum count for one clock pulse and is used
to enable the next cascaded stage to count.
Speciï¬cations
Speciï¬cations for Rad Hard QML devices are controlled by
the Defense Supply Center in Columbus (DSCC). The SMD
numbers listed below must be used when ordering.
Detailed Electrical Speciï¬cations for the HCTS160T are
contained in SMD 5962-95742. A âhot-linkâ is provided from
our website for downloading.
www.intersil.com/spacedefense/newsafclasst.asp
Intersilâs Quality Management Plan (QM Plan), listing all
Class T screening operations, is also available on our
website.
www.intersil.com/quality/manuals.asp
Ordering Information
ORDERING
NUMBER
PART NUMBER
TEMP.
RANGE
(oC)
5962R9574201TEC
HCTS160DTR
-55 to 125
5962R9574201TXC
HCTS160KTR
-55 to 125
NOTE: Minimum order quantity for -T is 150 units through
distribution, or 450 units direct.
Features
⢠QML Class T, Per MIL-PRF-38535
⢠Radiation Performance
- Gamma Dose (γ) 1 x 105 RAD(Si)
- Latch-Up Free Under Any Conditions
- SEP Effective LET No Upsets: >100 MEV-cm2/mg
- Single Event Upset (SEU) Immunity < 2 x 10-9
Errors/Bit-Day (Typ)
⢠3 Micron Radiation Hardened SOS CMOS
⢠Fanout (Over Temperature Range)
- Standard Outputs 10 LSTTL Loads
⢠Signiï¬cant Power Reduction Compared to LSTTL ICs
⢠DC Operating Voltage Range: 4.5V to 5.5V
⢠LSTTL Input Compatibility
- VIL = 0.8V Max
- VIH = VCC/2 Min
⢠Input Current Levels Ii ⤠5mA at VOL, VOH
Pinouts
HCTS160DTR (SBDIP), CDIP2-T16
TOP VIEW
MR 1
CP 2
P0 3
P1 4
P2 5
P3 6
PE 7
GND 8
16 VCC
15 TC
14 Q0
13 Q1
12 Q2
11 Q3
10 TE
9 SPE
HCTS160KTR (FLATPACK), CDFP4-F16
TOP VIEW
MR
CP
P0
P1
P2
P3
PE
GND
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
VCC
TC
Q0
Q1
Q2
Q3
TE
SPE
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
Satellite Applications Flow⢠(SAF) is a trademark of Intersil Corporation.
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