HCS163MS Datasheet, PDF (2/9 Pages) Intersil Corporation – Radiation Hardened Synchronous Presettable Counter

HCS163MS
Functional Block Diagram
P0
P1
3
4
1
MR
7
PE
10
TE
9
SPE
2
CP
TE
VCC
P D0
Q0
T0
MR
CP
P D1 _Q1
T1
MR
CP
Q0 Q1 Q2 Q3
P2
P3
5
6
TE
P D2 _Q2
T2
MR
CP
P D3 _Q3
T3
MR
CP
14
Q0
13
Q1
12
Q2
11
Q3
15
TC
TRUTH TABLE
INPUTS
OUTPUTS
OPERATING MODE
MR
CP
PE
TE
SPE
PN
QN
TC
Reset (clear)
l
X
X
X
X
L
L
Parallel Load
h (Note 3)
X
X
l
l
L
L
h (Note 3)
X
X
l
h
H
(Note 1)
Count
h (Note 3)
h
h
h (Note 3)
X
Count
(Note 1)
Inhibit
h (Note 3)
X
l (Note 2)
X
h (Note 3)
X
Qn
(Note 1)
h (Note 3)
X
X
l (Note 2) h (Note 3)
X
Qn
L
H = HIGH Voltage Level
L = LOW Voltage Level
h = HIGH voltage level one setup time prior to the LOW-to-HIGH clock transition
l = LOW voltage level one setup time prior to the LOW-to-HIGH clock transition
X = Immaterial
q = Lower case letter indicate the state of the referenced output prior to the LOW-to-HIGH clock transition
= LOW-to-HIGH clock transition
NOTES:
1. The TC output is HIGH when TE is HIGH and the counter is at terminal count (HLLH for 162 and HHHH for 163)
2. The HIGH-to-LOW transition of PE or TE on the 54/74163 and 54/74160 should only occur while CP is high for conventional operation
3. The LOW-to-HIGH transition of SPE or MR on the 54/74163 should only occur while CP is high for conventional operation
Spec Number 518835
221