ISL78208_14 Datasheet, PDF (18/24 Pages) Intersil Corporation – Wide VIN Dual Standard Buck Regulator with 3A/3A Continuous Output Current

ISL78208
required output capacitor value in order to achieve a desired
overshoot relative to the regulated voltage.
C_OUT
=
-----------------------------------^I--^O----^U----^T----²----^*---^L------------------------------------
V_OUT^2*V_OUTMAX  V_OUT² – 1 
(EQ. 8)
where V_OUTMAX/V_OUT is the relative maximum overshoot
allowed during the removal of the load. For an overshoot of 5%,
the equation becomes Equation 9:
C_OUT = _V-----_O----_U----_T--^I--₂^O----_*-^U--_--^T₁---_.-²-₀--^*-₅--^L---₂-----–----₁-----_
(EQ. 9)
The graph in Figure 44 shows the relationship of C_OUT and %
overshoot at 3 different output voltages. L is assumed to be 7µH
and I_OUT is 3A.
80
60
3.3V_OUT
40
5V_OUT
20
12V_OUT
0
1.02
1.04
1.06
V_OUTMAX/V_OUT
1.08
1.10
FIGURE 44. C_OUT vs OVERSHOOT V_OUTMAX/V_OUT
Current Sharing Configuration
In current sharing configuration, FB1 is connected to FB2, EN1 to
EN2, COMP1 to COMP2 and V_OUT1 to V_OUT2 as shown in Figure 3.
As a result, the equivalent gm doubles its single channel value.
Since the two channels are out-of-phase, the frequency will be 2X
the channel switching frequency. Ripple current cancellation will
reduce the ripple current seen by the output capacitors and thus
lower the ripple voltage. This results in the ability to use less
capacitance than would be required by a single phase design of
similar rating. Ripple current cancellation also reduces the ripple
current seen at the input capacitors.
Input Capacitor Selection
To reduce the resulting input voltage ripple and to minimize EMI by
forcing the very high frequency switching current into a tight local loop,
an input capacitor is required. The input capacitor must have adequate
ripple current rating, which can be approximated by the Equation 10.
If capacitors other than MLCC are used, attention must be paid to
ripple and surge current ratings.
-^I-^R----^M----^S-
Io
=
D – D²
(EQ. 10)
where D = V_O/V_IN
The input ripple current is graphically represented in Figure 45.
0.6
0.5
0.4
0.3
0.2
0.1
00
0.2
0.4
0.6
0.8
D
FIGURE 45. I_RMS/I_O vs DUTY CYCLE
A minimum of 10µF ceramic capacitance is required on each VIN
pin. The capacitors must be as close to the IC as physically
possible. Additional capacitance may be used.
Loop Compensation Design
ISL78208 uses a constant frequency current mode control
architecture to achieve simplified loop compensation and fast
loop transient response.
The compensator schematic is shown in Figure 47. As mentioned
in the C_OUT selection, ISL78208 allows the usage of low ESR
output capacitor. Choice of the loop bandwidth f_c is somewhat
arbitrary but should not exceed 1/4 of the switching frequency.
As a starting point, the lower of 100kHz or 1/6 of the switching
frequency is reasonable. The following equations determine
initial component values for the compensation, allowing the
designer to make the selection with minimal effort. Further detail
is provided in “Theory of Compensation” on page 19 to allow fine
tuning of the compensator.
Compensation resistor R₁ is given by Equation 11:
R₁
=
2_----_----f_--c---V_----o----C_----o----R_----T--
g_mV_FB
(EQ. 11)
which when applied to ISL78208 becomes Equation 12:
R₁k= 0.008247^f_c^V_o^C_o
(EQ. 12)
where C_o is the output capacitor value [µF], f_c = loop bandwidth
[kHz] and V_o is the output voltage [V].
Compensation capacitors C₁ [nF], C₂ [pF] are given by Equation 13:
C₁
=
-^C----^o----^-----^V----^o-----^-----^--¹---⁰----^--³--
I_o  R₁
,C₂
=
C_-----o----_-----R_-----c----_-----_--1_----0_---_---⁶_-
R₁
(EQ. 13)
where Io [A] is the output load current, R₁ (Ω) and R_c (Ω) is the
ESR of the output capacitor C_o.
Example: V_o = 5V, I_o = 3A, f_s = 500kHz, f_c = 50kHz,
C_o = 47µF/R_c = 5mΩ, then the compensation resistance
R₁ = 96kΩ.
The compensation capacitors are:
C₁ = 815pF, C₂ = 2.5pF (There is approximately 3pF parasitic
capacitance from V_COMP to GND; therefore, C₂ is optional).
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FN8354.1
July 29, 2014