ISL3332 Datasheet, PDF (18/26 Pages) Intersil Corporation – 3.3V, ±15kV ESD Protected, Two Port, Dua Protocol RS-232/RS-485 Transceivers

ISL3332, ISL3333
All but 10uA of SHDN supply current (I_CC plus I_L) is due to
control input (ON, LB, SP, DE, DEN) pull-up resistors
(~11μA/resistor), so SHDN supply current varies depending
on the ISL333X configuration. The spec tables indicate the
SHDN currents for configurations that optimize these
currents. For example, in RS-232 mode the SP pins aren’t
used, so if both ports are configured for RS-232, floating or
tying the SP pins high minimizes SHDN current. Likewise in
RS-485 mode, the drivers are disabled in SHDN, so driving
the DE and DEN pins high during this time also reduces the
supply current.
When enabling from SHDN in RS-232 mode, allow at least
25μs for the charge pumps to stabilize before transmitting
data. The charge pumps aren’t used in RS-485 mode, so the
transceiver is ready to send or receive data in less than 2µs,
which is much faster than competing devices that require the
charge pump for all modes of operation.
Internal Loopback Mode
Driving the LB pin low places both ports in the loopback
mode, a mode that facilitates implementing board level self
test functions. In loopback, internal switches disconnect the
Rx inputs from the Rx outputs, and feed back the Tx outputs
to the appropriate Rx output. This way the data driven at the
Tx input appears at the corresponding Rx output (refer to
“Typical Operating Circuits” on page 6”). The Tx outputs
remain connected to their terminals, so the external loads
are reflected in the loopback performance. This allows the
loopback function to potentially detect some common bus
faults such as one or both driver outputs shorted to GND, or
outputs shorted together.
Note that the loopback mode uses an additional set of
receivers, as shown in the “Typical Operating Circuits”.
These loopback receivers are not standards compliant, so
the loopback mode can’t be used to implement a half-duplex
RS-485 transceiver.
If loopback won’t be utilized, the pin can be left disconnected
(thanks to the internal pull-up), or it should be connected to
V_CC (V_L for the QFN), through a 1kΩ resistor.
ISL3333 (QFN Package) Special Features
Logic Supply (V_L Pin)
The ISL3333 (QFN) includes a V_L pin that powers the logic
inputs (Tx inputs and control pins) and Rx outputs. These
pins interface with “logic” devices such as UARTs, ASICs,
and μcontrollers, and today most of these devices use power
supplies significantly lower than 3.3V. Thus, a 3.3V output
level from a 3.3V powered dual protocol IC might seriously
overdrive and damage the logic device input. Similarly, the
logic device’s low V_OH might not exceed the V_IH of a 3.3V
powered dual protocol input. Connecting the V_L pin to the
power supply of the logic device (Figure 12) limits the
ISL3333’s Rx output V_OH to V_L (Figure 15), and reduces the
Tx and control input switching points to values compatible
V_CC = +3.3V
V_CC = +2V
R_A ^{VOH = 3.3V}
R_XD
ESD
DIODE
GND
V_IH ≥ 2
D_Y
V_OH ≤ 2 ^TXD
GND
ISL3332
V_CC = +3.3V
UART/PROCESSOR
V_CC = +2V
V_L
R_A ^{VOH = 2V}
R_XD
ESD
DIODE
GND
V_IH = 1V
D_Y
V_OH ≤ 2 ^TXD
GND
ISL3333
UART/PROCESSOR
FIGURE 12. USING V_L PIN TO ADJUST LOGIC LEVELS
with the logic device output levels. Tailoring the logic pin
input switching points and output levels to the supply voltage
of the UART, ASIC, or μcontroller eliminates the need for a
level shifter/translator between the two ICs.
V_L can be anywhere from V_CC down to 1.2V, but the input
switching points may not provide enough noise margin when
V_L < 1.5V. Table 5 indicates typical V_IH and V_IL values for
various V_L voltages so the user can ascertain whether or not
a particular V_L voltage meets his needs.
TABLE 5. V_IH AND V_IL vs. V_L FOR V_CC = 3.3V
V_L (V)
V_IH (V)
V_IL (V)
1.2
0.85
0.26
1.5
0.9
0.5
1.8
0.9
0.73
2.3
1.2
1.0
2.7
1.4
1.3
3.3
1.8
1.7
Note: With V_L ≤ 1.6V, the ISL3333 may not operate at the full
data rate unless the logic signal V_IL is at least 0.2V below
the typical value listed in Table 5.
The V_L supply current (I_L) is typically less than 80μA, even in
the worst case configuration, as shown in Figures 20 and 21.
With the Rx outputs unloaded, all of the DC V_L current is due
to inputs with internal pull-up resistors (DE, DEN, SP, LB,
18
FN6362.0
May 27, 2008